Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Johannes Koesters"'
Autor:
Johannes Koesters, Alex Goryachev
Publikováno v:
DAC
In a modern chip development cycle non-mainline / nonfunctional verification is gaining importance compared to traditional functional verification tasks and takes up to one third of the total verification effort. The purpose of non-mainline logic is
Autor:
Leitner Lawrence, S. M. German, Jackson Jonathan, Fady Copty, Richard D. Peterson, Schumann John A, Randall R. Pratt, Michal Rimon, Johannes Koesters, Amir Nahir, Klaus-Dieter Schubert, Holger Horbach, Bishop Brock, Oz Hershkovitz, Jörg Behrend, John M. Ludden, G. B. Meil, Charles Meissner, S. Ayub, Ronny Morad, Klaus Keuerleber, Viresh Paruthi
Publikováno v:
IBM Journal of Research and Development. 59:11:1-11:17
This paper describes methods and techniques used to verify the POWER8™ microprocessor. The base concepts for the functional verification are those that have been already used in POWER7® processor verification. However, the POWER8 design point prov
Autor:
Charles Meissner, John M. Ludden, Schumann John A, James P. Hsu, Jacob Buchert, Jackson Jonathan, Michael L. Behm, Wolfgang Roesner, Bishop Brock, Avi Ziv, Klaus-Dieter Schubert, Viresh Paruthi, Johannes Koesters
Publikováno v:
IBM Journal of Research and Development. 55:10:1-10:17
This paper describes the methods and techniques used to verify the POWER7® microprocessor and systems. A simple linear extension of the methodology used for POWER4®, POWER5®, and POWER6® was not possible given the aggressive design point and sche