Zobrazeno 1 - 10
of 27
pro vyhledávání: '"João V. F. Lima"'
Publikováno v:
The Journal of Supercomputing. 79:8890-8911
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b22d8d01aed93a905ed4dc1b506b8ce8
https://doi.org/10.1007/s11227-022-04932-3
https://doi.org/10.1007/s11227-022-04932-3
Publikováno v:
The Journal of Supercomputing.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2019318c9623f34ceeeb31638b324222
https://doi.org/10.1007/s11227-023-05166-7
https://doi.org/10.1007/s11227-023-05166-7
Publikováno v:
Journal of Parallel and Distributed Computing. 152:11-20
The demand for computing power, along with the diversity of computational problems, culminated in a variety of heterogeneous architectures. Among them, hybrid architectures combine different specialized hardware into a single chip, comprising a Syste
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c5f566b1c6259c5f6e2adb669b6c6fe
https://doi.org/10.1016/j.jpdc.2021.02.006
https://doi.org/10.1016/j.jpdc.2021.02.006
Publikováno v:
Computational Science and Its Applications – ICCSA 2022 Workshops ISBN: 9783031105418
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc3f29279ba79b60f81f43dcb6c5e11f
https://doi.org/10.1007/978-3-031-10542-5_39
https://doi.org/10.1007/978-3-031-10542-5_39
Publikováno v:
Anais da Escola Regional de Alto Desempenho da Região Sul (ERAD RS 2020).
Este trabalho apresenta um estudo sobre a utilização de um cluster de SoC's (System-on-a-chip) enquanto alternativa para a implantação do banco de dados não relacional e distribuído Cassandra. O cluster de SoCs é composto por quatro Raspberry
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f1f9212424a1d4bf11b75860566524b
https://doi.org/10.5753/eradrs.2020.10794
https://doi.org/10.5753/eradrs.2020.10794
Publikováno v:
Anais da Escola Regional de Alto Desempenho da Região Sul (ERAD RS 2020).
A heterogeneidade de arquiteturas de computação modernas permite que engenheiros refinem algoritmos para maximizar o nível de afinidade com a arquitetura e, consequentemente, a eficácia da computação. Neste trabalho, investigamos o impacto da p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8948a7b48b2cfa566d912e7ef0d8a5c0
https://doi.org/10.5753/eradrs.2020.10795
https://doi.org/10.5753/eradrs.2020.10795
Autor:
Thierry Gautier, João V. F. Lima
Publikováno v:
PDP 2020-28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing
PDP 2020-28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, Mar 2020, Västerås, Sweden. pp.1-8, ⟨10.1109/PDP50117.2020.00008⟩
PDP
PDP 2020-28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, Mar 2020, Västerås, Sweden. pp.1-8, ⟨10.1109/PDP50117.2020.00008⟩
PDP
International audience; In the last ten years, GPUs have dominated the market considering the computing/power metric and numerous research works have provided Basic Linear Algebra Subprograms implementations accelerated on GPUs. Several software libr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::74187e9fc15e9f1eba442c2d1bfe5489
https://inria.hal.science/hal-03121583
https://inria.hal.science/hal-03121583
Publikováno v:
IEEE Latin America Transactions. 15:1793-1800
This paper presents a performance evaluation of the NQueens benchmark implemented using OpenMP in parallel loop and asynchronous tasks versions. Our experiments aimed to evaluate which parallel strategy reaches the best performance, as well as to ver
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0b3860d8435b5d1cc6b2a2cee7850597
https://doi.org/10.1109/tla.2017.8015087
https://doi.org/10.1109/tla.2017.8015087
Publikováno v:
SBAC-PAD
Since the demand for computing power increases, new architectures arise to obtain better performance. An important class of integrated devices is heterogeneous architectures, which join different specialized hardware into a single chip, composing a S
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::05265f105b7706961103f2cd6f332809
https://doi.org/10.1109/sbac-pad.2019.00031
https://doi.org/10.1109/sbac-pad.2019.00031
Autor:
Gabriel Freytag, Vinicius Garcia Pinto, Claudio Schepke, Philippe O. A. Navaux, João V. F. Lima
Publikováno v:
PDP
Nowadays computing platforms expose a significant number of heterogeneous processing units such as multicore processors and accelerators. The task-based programming model has been a de facto standard model for such architectures since its model simpl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::588b920f6e965756c2a04b7e054e6354
https://doi.org/10.1109/empdp.2019.8671583
https://doi.org/10.1109/empdp.2019.8671583