Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Jincheol Sim"'
Publikováno v:
Electronics Letters, Vol 58, Iss 11, Pp 420-422 (2022)
Abstract A 4.5 Gb/s/pin transceiver capable of eliminating the inter‐symbol interference (ISI) and far‐end crosstalk (FEXT) in a hybrid scheme with low power and small area for next‐generation high‐bandwidth memory (HBM) interfaces is present
Externí odkaz:
https://doaj.org/article/1f637dd7d4ca4de0ac85fa9bf8b4a956
Autor:
Yoonjae Choi, Sewook Hwang, Yeonho Lee, Hyunsu Park, Jonghyuck Choi, Jincheol Sim, Chulwoo Kim
Publikováno v:
IEEE Access, Vol 9, Pp 118907-118918 (2021)
This paper presents an area- and energy- efficient digital sub-sampling clock and data recovery (CDR) with combined adaptive equalizer and self-error corrector (SEC). Using the digitized phase difference between the incoming data and the full-rate ou
Externí odkaz:
https://doaj.org/article/24c827106237478c960a339a209603d6
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 70:1907-1916
Autor:
Jonghyuck Choi, Yoonjae Choi, Hyunsu Park, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Chulwoo Kim
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 70:904-908
Autor:
Yoonjae Choi, Hyunsu Park, Jonghyuck Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Changmin Sim, Chulwoo Kim
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. :1-10
Autor:
Youngwook Kwon, Hyunsu Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Seungwoo Park, Kyeong-Min Kim, Changkyu Choi, Hae-Kang Jung, Chulwoo Kim
Publikováno v:
IEEE Journal of Solid-State Circuits. :1-12
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 70:101-105
Autor:
Jonghyuck Choi, Yoonjae Choi, Hyunsu Park, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Chulwoo Kim
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 69:3416-3427
Autor:
Youngwook Kwon, Hyunsu Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Seungwoo Park, Chulwoo Kim
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 69:2737-2741
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 69:794-798
This paper presents a phase rotator (PR)-based delay-locked loop (DLL) for a dynamic random-access memory interface in 28-nm CMOS technology. A direct input-output comparison using a sub-sampling technique reduces the effect of a timing mismatch of a