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of 44
pro vyhledávání: '"Jin-Hua Hong"'
Autor:
Jin-Hua Hong, 洪進華
88
In this dissertation, bit-level systolic arrays for RSA public key cryptosystem are designed based on improved Montgomery''s algorithm. The improved Montgomery''s algorithm guarantees that the partial products in all modular multiplications f
In this dissertation, bit-level systolic arrays for RSA public key cryptosystem are designed based on improved Montgomery''s algorithm. The improved Montgomery''s algorithm guarantees that the partial products in all modular multiplications f
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/47801842663306688476
Publikováno v:
2022 IEEE International Test Conference in Asia (ITC-Asia).
Autor:
Wei-Ling Yi, Jin-Hua Hong
Publikováno v:
FSKD
A 3rd-order single-bit sigma-delta modulator is designed using TSMC 0.35-µm 2P4M process, which achieves a 97-dB SNR in a signal bandwidth of 20 kHz and with a sampling frequency of 5.12 MHz. The modulator is implemented by a fully-differential swit
Autor:
Jin-Hua Hong, Cheng-Wen Wu
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11:474-484
We propose a radix-4 modular multiplication algorithm based on Montgomery's algorithm, and a fast radix-4 modular exponentiation algorithm for Rivest, Shamir, and Adleman (RSA) public-key cryptosystem. By modifying Booth's algorithm, a radix-4 cellul
Autor:
Zong-Yi Chen, Jin-Hua Hong
Publikováno v:
MWSCAS
Publikováno v:
VLSI-DAT
Three-dimensional integration is considered a promising solution to cure the challenges of performance, power consumption, quality, and reliability issues. The feature of 2.5D ICs is that the dies are stacked on a passive silicon interposer and the d
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 8:503-516
An IEEE 1149.5 module test and maintenance (MTM) bus slave module interface core is presented, which is used for direct access from the system bus to the IEEE 1149.1 chip-level or on-chip buses to facilitate hierarchical system test and diagnosis. Th
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 17:724-736
A fast fault simulation approach based on ordinary logic emulation is proposed. The circuit configured into our system that emulates the faulty circuit's behaviour is synthesized from the good circuit and the given fault list in a novel way. Fault in
Autor:
Jin-Hua Hong, Cheng-Chang Yu, Kai-Feng Huang, Ming Chang Shih, Yu-Ting Hsu, Wen-How Lan, Chien-Jung Huang
Publikováno v:
Journal of Nanomaterials, Vol 2013 (2013)
ZnO thin film was fabricated by thermally oxidized Zn at 600°C for 1 h. A surface containing nanostructured dumbbell and lines was observed by scanning electron microscope (SEM). The ZnO resistor device was formed after the following Ti/Au metalliza
Publikováno v:
ICVES
The visual based Lane Departure Warning System (LDWS) is one of the emerging systems for reducing traffic accidents. In this paper, we extend our peak-finding based lane detection algorithm and the spatiotemporal based dual warning mechanisms to an i