Zobrazeno 1 - 10
of 19
pro vyhledávání: '"Jicheol Bea"'
Autor:
Hisashi Kino, Mitsumasa Koyanagi, Mariappan Murugesan, H. Hashiguchi, Tetsu Tanaka, Jicheol Bea, Hiroyuki Hashimoto, Takafumi Fukushima
Publikováno v:
IEEE Transactions on Electron Devices. 64:5065-5072
A self-assembly and electrostatic (SAE) carrier technology is developed for high-precision and high-throughput chip-to-wafer 3-D integration. In this paper, water surface tension-driven chip assembly is combined with electrostatic adhesion to keep hi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7add33cd8262993861f991c0b5e56e25
https://doi.org/10.1109/ted.2017.2767598
https://doi.org/10.1109/ted.2017.2767598
Autor:
Yuki Ohara, Takafumi Fukushima, Jicheol Bea, Tetsu Tanaka, Mitsumasa Koyanagi, K. Kiyoyama, Kang-Wook Lee, Mariappan Murugesan
Publikováno v:
IEEE Transactions on Electron Devices. 60:3842-3848
We proposed a die-level 3-D integration technology for rapid prototyping of high-performance multifunctionality hetero-integrated systems. Commercially available 2-D chips with different functions and sizes could be processed and integrated in die le
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::45fd23aac6244d4550f327003ad53667
https://doi.org/10.1109/ted.2013.2280273
https://doi.org/10.1109/ted.2013.2280273
Autor:
Jicheol Bea, Xin Wu, Mitsumasa Koyanagi, Ai Nakamura, Tanaka Tanaka, K. W. Lee, Suresh Ramalingam, Takafumi Fukushima
Publikováno v:
3DIC
We propose nano-scale Cu direct bonding technology using ultra-high density Cu nano-pillar (CNP) with for high stacking yield exascale 2.5D/3D integration. We clarified the joining mechanism of nano-scale Cu direct bonding using CNP. Nano-scale Cu pi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5ac6102fb2b074653307aa2212b5a291
https://doi.org/10.1109/3dic.2016.7970027
https://doi.org/10.1109/3dic.2016.7970027
Autor:
Jicheol Bea, M. Koyanagi, Yanli Pei, Tetsu Tanaka, Toshiya Kojima, Hisashi Kino, T. Fukushima, Chengkuan Yin
Publikováno v:
IEEE Transactions on Nanotechnology. 10:528-531
We report high-performance MOSFET nonvolatile memory with high-density cobalt-nanodots (Co-NDs) floating gate (the density is as high as 4-5 × 1012 /cm 2 and the size is ~2 nm) and HfO2 high-k blocking dielectric. The device is fabricated using a ga
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5f4495d829d414b4b442ae6cfdaca58
https://doi.org/10.1109/tnano.2010.2050331
https://doi.org/10.1109/tnano.2010.2050331
Autor:
Takafumi Fukushima, Jicheol Bea, Tetsu Tanaka, Yuji Sutou, Kang-Wook Lee, Mariappan Murugesan, Hao Wang, Junichi Koike, Mitsumasa Koyanagi
Publikováno v:
IEEE Electron Device Letters. 35:114-116
The effect of CVD Mn oxide layer as a barrier layer to Cu diffusion for 3-D TSV was characterized. The impact of oxide substrate on the barrier property of a planar Mn oxide was evaluated by XPS method. Planar Mn oxide layer of 20-nm thickness formed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::86458aa68eaca0d0cb8ae471b73cda55
https://doi.org/10.1109/led.2013.2287879
https://doi.org/10.1109/led.2013.2287879
Publikováno v:
Surface and Interface Analysis. 38:1720-1724
In order to improve the complementary metal-oxide-semiconductor (CMOS) circuit performance under sub-100 nm technology nodes with low supply voltages, a metal-oxide-semiconductor field-effect transistor (MOSFET) including a high mobility channel and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::61de4a6550dc714847c80b71e35bb851
https://doi.org/10.1002/sia.2434
https://doi.org/10.1002/sia.2434
Autor:
Jicheol Bea, Koji Choki, Kang-Wook Lee, Tetsu Tanaka, Takafumi Fukushima, Mitsumasa Koyanagi, Mariappan Murugesan, Yuka Ito
Publikováno v:
3DIC
A 12-channel vertical cavity surface emitting laser (VCSEL) chip was heterogeneously self-assembled to a glass interposer wafer by liquid surface tension as a driving force. The size of the VCSEL chip was 0.35 mm wide and 3 mm long. From the square d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ca1a61d1ef0ab5192c464c85abc3780
https://doi.org/10.1109/3dic.2014.7152145
https://doi.org/10.1109/3dic.2014.7152145
Autor:
Jicheol Bea, Takafumi Fukushima
Publikováno v:
Handbook of 3D Integration: 3D Process Technology
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5558e709c85c8490c4bdf22ae43154f
https://doi.org/10.1002/9783527670109.ch24
https://doi.org/10.1002/9783527670109.ch24
Autor:
Mitsumasa Koyanagi, Kang-Wook Lee, Akihiro Noriki, Jicheol Bea, Tetsu Fanaka, Takafumi Fukushima
Publikováno v:
3DIC
To realize very high performance computing system, we have proposed a novel opto-electronic 3-D LSI in which both electrical and optical devices are integrated. To realize such opto-electronic 3-D LSI, through Si photonic via (TSPV) is indispensable
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::97c4c5de2e3ad945ea9faeffbe8bb287
https://doi.org/10.1109/3dic.2012.6262957
https://doi.org/10.1109/3dic.2012.6262957
Autor:
Tetsu Tanaka, Jicheol Bea, Kang-Wook Lee, Mitsumasa Koyanagi, Yuki Ohara, Takafumi Fukushima, Mariappan Murugesan
Publikováno v:
3DIC
We have demonstrated bonding strength control for self-assembly-based 3D integration in which many chips are instantly assembled on a wafer all at once by using liquid droplets, and then, temporarily bonded to the wafer. The wafer is named Reconfigur
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc28e62d14bb02de8439803a60fc665d
https://doi.org/10.1109/3dic.2012.6262954
https://doi.org/10.1109/3dic.2012.6262954