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pro vyhledávání: '"Jian-Dong Lee"'
Autor:
Jian-Dong Lee, 李建東
105
Junctionless FETs (JLFETs) suffer an optimum design (or trade-off) on the channel doping to gain high drain current and low off current. This because high channel doping can get the high driving current, but it suffers the higher device leak
Junctionless FETs (JLFETs) suffer an optimum design (or trade-off) on the channel doping to gain high drain current and low off current. This because high channel doping can get the high driving current, but it suffers the higher device leak
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/3w629r
Publikováno v:
2016 IEEE Silicon Nanoelectronics Workshop (SNW).
This work investigates the effects of GO RRAM w/ and w/o boron doping, and the effects of thermal annealing. From the experiment results, the B-doped GO RRAM annealed at 350°C shows the best performance with a higher resistance ratio of 4.15 orders
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::75c8189f76e50c2502e27d3d4fc85bab
https://doi.org/10.1109/snw.2016.7577992
https://doi.org/10.1109/snw.2016.7577992
