Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Ji-Ting Liang"'
Publikováno v:
IEEE Transactions on Electron Devices. 59:1599-1606
Using unique ambipolar conduction, a Schottky barrier multibit cell can be programmed using source-side electron injection and can be erased reversely using drain-side hole compensation. This paper numerically discusses the particular reading operati
Autor:
Riichiro Shirota, Su Lu, Ming-Kun Huang, Chun-Hsing Shih, Yan-Xiang Luo, Sau-Mou Wu, Wei Chang, Ji-Ting Liang, A Wang, Chiu-Tsung Huang, Nguyen Dang Chien, Chenhsin Lien, Wen-Fa Wu
Publikováno v:
IEEE Transactions on Electron Devices. 58:1257-1263
The edge encroachment of tunnel oxide is experimentally found to degrade the Fowler-Nordheim (FN) tunneling gate current of NAND-type Flash cells. This work elucidates the impact of edge encroachment on FN tunneling current for use in programming and
Autor:
Ji-Ting Liang, Chun-Hsing Shih
Publikováno v:
IEEE Transactions on Electron Devices. 57:1774-1780
This paper presents a novel Schottky barrier multibit cell with source-side injected programming and reverse drain-side hole erasing. Based on the unique ambipolar conduction of Schottky barrier devices, the source Schottky barrier promotes the amoun
Autor:
Yan-Xiang Luo, Jr-Jie Tsai, Ming-Kun Huang, Ruei-Kai Shia, Wen-Fa Wu, Wei Chang, Nguyen Dang Chien, Ji-Ting Liang, Chenhsin Lien, Chun-Hsing Shih
Publikováno v:
IEEE Electron Device Letters. 32:1477-1479
A new Schottky barrier (SB) nonvolatile nanowire memory is reported experimentally with efficient low-voltage programming and erasing. By applying an SB source/drain to enhance the electrical field in the silicon gate-all-around nanowire, the nonvola
Publikováno v:
IEEE Electron Device Letters. 32:1331-1333
This letter explores source-side injection in Schottky barrier metal-oxide-semiconductor (MOS) devices. Unlike drain-side injection in conventional MOS devices, a source-side lucky electron model predicts the specific source-side injection in Schottk
Autor:
Ji-Ting Liang, Chun-Hsing Shih
Publikováno v:
2007 International Semiconductor Device Research Symposium.
Conventional floating gate flash memory has been the mainstream VLSI memory for the past decade. However, as the gate length scaled into nanoscale regime, it is great challenge to continue the scaling pace due to the physical limit of the tunneling o
Autor:
Chun-Hsing Shih1 cshih@ncnu.edu.tw, Ji-Ting Liang2,3
Publikováno v:
IEEE Transactions on Electron Devices. Aug2010, Vol. 57 Issue 8, p1774-1780. 7p.
Autor:
Chun-Hsing Shih, Ji-Ting Liang
Publikováno v:
2007 International Semiconductor Device Research Symposium; 2007, p1-2, 2p