Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Ji-Soong Park"'
Publikováno v:
SPIE Proceedings.
It became more challenging to guarantee the overall mask Critical Dimension (CD) quality according to the increase of hot spots and assist features at leading edge devices. Therefore, mask CD correction methodology has been changing from the rule-bas
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fbc58c6a3dcb5294b6140966e0c2686
https://doi.org/10.1117/12.2197162
https://doi.org/10.1117/12.2197162
Publikováno v:
SPIE Proceedings.
The computational lithography such as inverse lithography technique (ILT) or source mask optimization (SMO) is considered as the necessary technique for the extremely low k1 lithography process of sub-20nm node. The ideal curvilinear mask design for
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54e494215c47e9f817e0bdb8a08ef68d
https://doi.org/10.1117/12.2011341
https://doi.org/10.1117/12.2011341
Publikováno v:
SPIE Proceedings.
In the IC process, the designed circuit pattern is drawn onto film or glass plate as a photo mask. This original mask is used to transform its transparent pattern onto semiconductor wafers by optical projection. To make photo mask we should convert t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::130ebc19875bd712fd096b68b1b13fb0
https://doi.org/10.1117/12.632370
https://doi.org/10.1117/12.632370
Publikováno v:
SPIE Proceedings.
As the design rule with wafer is tightening to sub-100nm, the specification of Mask CD uniformity is steeply tightened too. For instance, according to 2004 ITRS Roadmap updated, the specification of DRAM's CD uniformity requires less then 7nm on 80nm
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7ee158ba8f248008fe0604b081726e2d
https://doi.org/10.1117/12.617091
https://doi.org/10.1117/12.617091
Autor:
Woo-Sung Han, Sun-young Choi, In-Kyun Shin, Sung-Woon Choi, Gi-sung Yoon, Ji-Soong Park, Chan-Uk Jeon, Sung-Hyuck Kim
Publikováno v:
SPIE Proceedings.
As a promising technology for sub-65nm node optical lithography, CLM(Chrome-Less Mask) technology among RETs(Resolution Enhancement Techniques) for low k 1 has been researched worldwide in recent years. CLM has several advantages, such as relatively
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::67852c59749e37091c0dedd75b2031c9
https://doi.org/10.1117/12.617201
https://doi.org/10.1117/12.617201
Autor:
Myoung-Soo Lee, Ji-Soong Park, Chang-Hwan Kim, In-Gyun Shin, Hee-Sun Yoon, Sung-Hyuk Kim, Sung-Woon Choi, Woo-Sung Han
Publikováno v:
SPIE Proceedings.
In the ArF lithography for sub-100nm, PSM (Phase Shift Mask) has been considered as one of the basic RETs (Resolution Enhancement Techniques). Nowadays, besides attenuated PSM, alternating PSM and CPL (Chromeless Phase Lithography) containing Cr patc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f09a01ddf91e79825f2307e4edf81bc
https://doi.org/10.1117/12.535976
https://doi.org/10.1117/12.535976
Autor:
Ji-Soong Park, Sung-Woon Choi, Jung-Min Sohn, Douglas Van Den Broeke, Jae-Han Lee, Hye-Soo Shin, In-Kyun Shin, J. Fung Chen, Thomas Laidig, Sung-Hyuck Kim
Publikováno v:
SPIE Proceedings.
High speed circuit usually requires additional gate scaling regardless of its developed technology node. In this paper, we demonstrate the full-chip-level wafer result for 100nm node SRAM gate and the possibility of future gate scaling. Test reticle
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::099327a5d66de9b80b96c54cfd1872c5
https://doi.org/10.1117/12.518014
https://doi.org/10.1117/12.518014
Autor:
Jeong-Taek Kong, Tae-Hwang Jang, Chul-Hong Park, Sang-Uhk Rhie, Dong-Hyun Kim, Yoo-Hyon Kim, Jun-Seong Park, Soo-Han Choi, Moon-Hyun Yoo, Ji-Soong Park
Publikováno v:
ISQED
The hybrid PPC (process proximity correction) has been one of the inevitable methods for the sub-wavelength lithography to satisfy the requirements of CD control and yield improvement. In this paper, an effective methodology for hybrid PPC is present
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c46c8d280ace4f2eaf93e2617803a923
https://doi.org/10.1109/isqed.2002.996717
https://doi.org/10.1109/isqed.2002.996717
Autor:
Ji-Soong Park, Dong-Hoon Chung, Hye-Soo Shin, J. Fung Chen, Sung-Hyuck Kim, In-Kyun Shin, Jung-Min Sohn, Jae-Han Lee, Seong-Woon Choi, Douglas Van Den Broeke
Publikováno v:
SPIE Proceedings.
Chrome Less phase lithography (CPL) may be the crucial technology to print 100nm node and below. CPL can apply to various design layers without causing phase conflicts, while phase edge phase shift mask (PEPSM) is beneficial for specific pattern conf
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::36787dd35e9851a8b20c8c8204b1a65c
https://doi.org/10.1117/12.468097
https://doi.org/10.1117/12.468097
Autor:
Sang-Uhk Rhie, Hyung-Woo Kim, Ji-Soong Park, Moon-Hyun Yoo, Chul-Hong Park, Sun-Il Yoo, Yoo-Hyon Kim, Jeong-Taek Kong
Publikováno v:
ISQED
The increasing complexity and data volume of VLSI designs demand an efficient optical proximity correction (OPC) technique. In this paper, we address the issues related to the gate bridge, which is serious in sub-quarter micron technology, and the wi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dfe349a2b3ec4a10ddca09855a0b966d
https://doi.org/10.1109/isqed.2000.838858
https://doi.org/10.1109/isqed.2000.838858