Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Ji-Seong Doh"'
Autor:
Jinwoo Kim, Ji-Seong Doh, Dae Sin Kim, Kang-Hyun Baek, Wonik Jang, Changwook Jeong, In Huh, Yoon-Suk Kim, Jisu Ryu, Jae-ho Kim, Yongwoo Jeon, Sanghoon Myung, Jaemin Kim, Songyi Han
Publikováno v:
2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).
This paper presents a novel approach to enable real-time device simulation and optimization. State-of-the-art algorithms which can describe semiconductor domain are adopted to train deep learning models whose input and output are process condition an
Autor:
Ji Seong Doh, Jun Dong Cho
Publikováno v:
Journal of the Institute of Electronics and Information Engineers. 49:234-241
This paper proposes a novel design methodology considering transistor layout variation. The proposed design technique is to improve the transistor`s electrical characteristics without performing a circuit simulation to extract transistor layout varia
Autor:
Moon-Hyun Yoo, Yu-Jin Pyo, Dae-Wook Kim, Chul-Hong Park, Ji-Seong Doh, Sanghoon Lee, Ji-Suk Hong, Hyun-Jae Kang, Jai-kyun Park
Publikováno v:
SPIE Proceedings.
Overlay performance and control requirements have become crucial for achieving high yield and reducing rework process. Increasing discrepancy between hardware solutions and overlay requirements, especially in sub-40nm dynamic random access memory (DR
Autor:
Young-Gu Kim, Sung-eun Yu, Young-Kwan Park, Jeong-Taek Kong, Jae-Woo Im, Sanghoon Lee, Dae-Wook Kim, Dae-Han Kim, Ji-Seong Doh
Publikováno v:
ISQED
A multilevel level cell (MLC) technique for flash memories reduces the bit cost and enhances the memory density. However, it is difficult to get a required sensing margin for MLC due to the need for the tight threshold voltage control. We present a n
Autor:
Dae-Wook Kim, Moon-Hyun Yoo, Jong-bae Lee, Ji-Seong Doh, Sang-Hoon Lee, Young-Kwan Park, Jeong-Taek Kong
Publikováno v:
2005 International Conference On Simulation of Semiconductor Processes and Devices.
An efficient characterization technique with the spatial correlation matrix from electrical device parameters such as threshold voltage and saturation current accounting for inter- and intra-die variations is demonstrated. Then, a unified statistical
Autor:
Ji-Seong Doh, Dae-Wook Kim, Sang-Hoon Lee, Jong-Bae Lee, Young-kwan Park, Moon-Hyun Yoo, Jeong-Taek Kong
Publikováno v:
2005 International Conference On Simulation of Semiconductor Processes & Devices; 2005, p131-134, 4p