Zobrazeno 1 - 10
of 39
pro vyhledávání: '"Ji Bo Wei"'
Publikováno v:
Tongxin xuebao, Vol 37, Pp 137-143 (2016)
To take advantage of multiprocessor platform,it is a necessity to map tasks of the application properly onto different processors to exploit the concurrency in the application and thus meet the stringent timing requirements.Parallelism graph was prop
Externí odkaz:
https://doaj.org/article/28c3cf797ee24d81aec003a84ed3de63
Publikováno v:
Tongxin xuebao, Vol 37, Pp 192-198 (2016)
A space-alternating generalized maximum-likelihood (SAGL) list detection algorithm with lower-complexity for V-BLAST systems was proposed. The sub-detector involved in the proposed list detection algor hm consisted of sim-plified maximum-likelihood (
Externí odkaz:
https://doaj.org/article/a2e27f4ab54245c9b861f8dc1526e403
Publikováno v:
Tongxin xuebao, Vol 35, Pp 17-24 (2014)
The resource allocation problem in cooperative OFDMA systems with mobile stations (MS) on multi-services was investigated. In order to maximize the sum utility of all MS under per-relay power constraint(PPC), an asymptotic optimal resource allocation
Externí odkaz:
https://doaj.org/article/57667def056744ea80aaa36981c78375
Publikováno v:
ACM Transactions on Reconfigurable Technology and Systems. 13:1-24
Field programmable gate array (FPGA) is ubiquitous nowadays and is applied to many areas. Dynamic partial reconfiguration (DPR) is introduced to most modern FPGAs, enabling changing the function of a part of the FPGA by dynamically loading new bitstr
Publikováno v:
Tongxin xuebao, Vol 33, Pp 132-139 (2012)
The packet error rate(PER)of the packet cooperative relay system for both(amplify-and-forward)and DF(decode-and-forward)schemes in the high signal-to-noise ratio(SNR)region was analyzed,and the effect of packet length on PER performance was studied.I
Externí odkaz:
https://doaj.org/article/e6326adace704ef9bb22583926fbcb7b
Publikováno v:
Tongxin xuebao, Vol 32, Pp 147-158 (2011)
Key techniques in cognitive wireless networks and the state-of-the-art of this research were surveyed.The first focus was on the techniques to obtain network information,which was classified into spectrum sensing in PHY layer and available bandwidth
Externí odkaz:
https://doaj.org/article/7ffee836e6454b9ca7af10c3f7cd6afa
Publikováno v:
Electronics, Vol 9, Iss 1461, p 1461 (2020)
Electronics
Volume 9
Issue 9
Electronics
Volume 9
Issue 9
Dynamically partially reconfigurable (DPR) technology based on FPGA is applied extensively in the field of high-performance computing (HPC) because of its advantages in processing efficiency and power consumption. To make full use of the advantages o
Optimization of Duplication-Based Schedules on Network-on-Chip Based Multi-Processor System-on-Chips
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 28:826-837
Many applications such as streaming applications are both computation and communication intensive. The Multi-Processor System-on-Chip (MPSoC) based on Network-on-Chip (NoC) outperforms the multiprocessors with bus-based networking architecture in com
Publikováno v:
Electronics Letters. 53:358-360
A joint power and rate optimisation for multihop relay networks adopting different hybrid automatic repeat request (HARQ) schemes are investigated. Specifically, Type-I HARQ, chase-combining-based HARQ and schemes without HARQ are considered with pra
Publikováno v:
ACM Transactions on Embedded Computing Systems, 16(2):49, 49:1-49:25. Association for Computing Machinery, Inc
ACSD
ACM Transactions on Embedded Computing Systems, 2, 16
Application of Concurrency to System Design, 15th International Conference, ACSD 2015, Brussels, Belgium, 21-26 June 2015, 90-99
STARTPAGE=90;ENDPAGE=99;TITLE=Application of Concurrency to System Design, 15th International Conference, ACSD 2015, Brussels, Belgium, 21-26 June 2015
ACSD
ACM Transactions on Embedded Computing Systems, 2, 16
Application of Concurrency to System Design, 15th International Conference, ACSD 2015, Brussels, Belgium, 21-26 June 2015, 90-99
STARTPAGE=90;ENDPAGE=99;TITLE=Application of Concurrency to System Design, 15th International Conference, ACSD 2015, Brussels, Belgium, 21-26 June 2015
Multi-processor systems-on-chips are widely adopted in implementing modern streaming applications to satisfy the ever increasing computing requirements. Predictable memory hierarchies, which make memory access predictable, can better satisfy the stri
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::389a8a87db549a087e01df8803620264
https://research.tue.nl/nl/publications/819d04b3-a58b-4230-866a-8877f516b522
https://research.tue.nl/nl/publications/819d04b3-a58b-4230-866a-8877f516b522