Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Jhih-Yuan Pan"'
Autor:
Sze Pei Lim, Cheng-Ta Ko, Henry Yang, Tony Chen, Cao Xi, Eric Kuah, Zhang Li, Hsing-Hui Wu, Jeffery C. C. Lo, Yu-Hua Chen, Chieh-Lin Chang, Jhih-Yuan Pan, Kim Hwee Tan, John H. Lau, Mian Tao, Junfen Lin, Nelson Fan, Ning Cheng Lee, Iris Xu, Penny Lo, Marc Lin, Margie Li, Ming Li, Ricky Lee, Rozalia Beica, Chia-Hung Lin, Curry Lin
Publikováno v:
International Symposium on Microelectronics. 2018:000057-000063
The design, materials, process, and fabrication of a heterogeneous integration of four chips by a fan-out panel-level packaging (FOPLP) method are investigated in this study. Emphasis is placed on (1) the application of a dry-film epoxy molding compo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4ec134f623ce6fdc187807dc5c121c26
https://doi.org/10.4071/2380-4505-2018.1.000057
https://doi.org/10.4071/2380-4505-2018.1.000057
Autor:
Wu Kai, Iris Xu, Ji Hao, Tony Chen, Margie Li, Qing Xiang Yong, Ming Li, Zhang Li, Henry Yang, Zhong Cheng, Sze Pei Lim, Ricky Lee, Koh Sau Wee, Curry Lin, Hsing-Hui Wu, Cheng-Ta Ko, Yiu Ming Cheung, Rozalia Beica, Kim Hwee Tan, Jeffery C. C. Lo, Jiang Ran, Cao Xi, Eric Kuah, John H. Lau, Marc Lin, Yu-Hua Chen, Ning-Cheng Lee, Mian Tao, Nelson Fan, Jhih-Yuan Pan, Chieh-Lin Chang, Eric Ng, Jin Lin
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 8:1561-1572
The design, materials, process, fabrication, and reliability of a heterogeneous integration of 4 chips and 4 capacitors by a FOPLP (fan-out panel-level packaging) method are investigated in this study. Emphasis is placed on the application of a speci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3270e7214d93e6150976a379ff1a6d59
https://doi.org/10.1109/tcpmt.2018.2848665
https://doi.org/10.1109/tcpmt.2018.2848665
Autor:
N. C. Lee, Jeffery C. C. Lo, Jhih-Yuan Pan, Mian Tao, John H. Lau, Sze Pei Lim, Ming Li, R. So, Tony Chen, Eric Ng, Ricky Lee, Hsing-Hui Wu, Marc Lin, Zhang Li, Yiu Ming Cheung, Henry Yang, Kim Hwee Tan, Penny Lo, Cheng-Ta Ko, Chieh-Lin Chang, Y. H. Chen, Cao Xi, Eric Kuah, Rozalia Beica, Curry Lin, Iris Xu, Nelson Fan
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fan-out panel-level packaging) with chip-first and dies face-down formation are investigated in this study. Emphasis is placed on the application of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f12c16c4e4d496548ffba5ff7a4fb443
https://doi.org/10.1109/ectc.2019.00010
https://doi.org/10.1109/ectc.2019.00010
Autor:
Cheng-Ta Ko, Yang, Henry, Lau, John, Ming Li, Margie Li, Lin, Curry, Lin, J. W., Chieh-Lin Chang, Jhih-Yuan Pan, Hsing-Hui Wu, Yu-Hua Chen, Chen, Tony, Xu, Iris, Lo, Penny, Fan, Nelson, Kuah, Eric, Zhang Li, Kim Hwee Tan, Chia-Hung Lin, Beica, Rozalia
Publikováno v:
Journal of Microelectronic & Electronic Packaging; Oct2018, Vol. 15 Issue 4, p141-147, 7p