Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Jeremy Fowers"'
Autor:
Murali Emani, Zhen Xie, Siddhisanket Raskar, Varuni Sastry, William Arnold, Bruce Wilson, Rajeev Thakur, Venkatram Vishwanath, Zhengchun Liu, Michael E. Papka, Cindy Orozco Bohorquez, Rick Weisner, Karen Li, Yongning Sheng, Yun Du, Jian Zhang, Alexander Tsyplikhin, Gurdaman Khaira, Jeremy Fowers, Ramakrishnan Sivakumar, Victoria Godsoe, Adrian Macias, Chetan Tekur, Matthew Boyd
Publikováno v:
2022 IEEE/ACM International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS).
Autor:
Dennis Abts, Garrin Kimmell, Andrew Ling, John Kim, Matt Boyd, Andrew Bitar, Sahil Parmar, Ibrahim Ahmed, Roberto DiCecco, David Han, John Thompson, Michael Bye, Jennifer Hwang, Jeremy Fowers, Peter Lillian, Ashwin Murthy, Elyas Mehtabuddin, Chetan Tekur, Thomas Sohmers, Kris Kang, Stephen Maresh, Jonathan Ross
Publikováno v:
Proceedings of the 49th Annual International Symposium on Computer Architecture.
Autor:
Prerak Patel, Gabriel Weisz, Kalin Ovtcharov, Lo Daniel, Doug Burger, Shlomi Alkalay, Stephen F. Heil, Adam Sapek, Michael Haselman, Steven K. Reinhardt, Todd Massengill, Jeremy Fowers, Eric S. Chung, Michael K. Papamichael, Adrian M. Caulfield, Logan Adams, Sitaram Lanka, Ming Liu, Lisa Woods, Mahdi Ghandi
Publikováno v:
IEEE Micro. 39:20-28
Growing computational demands from deep neural networks (DNNs), coupled with diminishing returns from general-purpose architectures, have led to a proliferation of Neural Processing Units (NPUs). This paper describes the Project Brainwave NPU (BW-NPU
Autor:
Friedel van Megen, Oren Firestein, Bita Darvish Rouhani, Mahdi Ghandi, Christian Boehn, Prerak Patel, Kara Kagi, Hari Angepat, Doug Burger, Brandon Perez, Raja Seera, Tamas Juhasz, Jeremy Fowers, Shlomi Alkalay, Logan Adams, Gabriel Weisz, Balaji Sridharan, Sangeetha Shekar, Kyle Holohan, Ritchie Zhao, Amanda Rapsang, Ahmad M. El Husseini, Adam Sapek, Todd Massengill, Kalin Ovtcharov, Sitaram Lanka, Dan Zhang, Michael K. Papamichael, Derek Chiou, Lo Daniel, Michael Haselman, Lisa Woods, Kang Su Gatlin, Maleen Abeydeera, Phillip Yi Xiao, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Alessandro Forin, Stephen F. Heil, Ratna Kumar Kovvuri, Dima Mukhortov, Ming Liu
Publikováno v:
IEEE Micro. 38:8-20
To meet the computational demands required of deep learning, cloud operators are turning toward specialized hardware for improved efficiency and performance. Project Brainwave, Microsofts principal infrastructure for AI serving in real time, accelera
Autor:
Hari Angepat, Eric S. Chung, Stephen F. Heil, Todd Massengill, Doug Burger, Matt Humphrey, Joo-Young Kim, Andrew Putnam, Adrian M. Caulfield, Derek Chiou, Lisa Woods, Jeremy Fowers, Sitaram Lanka, Daniel Firestone, Puneet Kaur, Kalin Ovtcharov, Lo Daniel, Michael K. Papamichael, Michael Haselman
Publikováno v:
IEEE Micro. 37:52-61
Hyperscale datacenter providers have struggled to balance the growing need for specialized hardware with the economic benefits of homogeneity. The Configurable Cloud datacenter architecture introduces a layer of reconfigurable logic (FPGAs) between t
Publikováno v:
ACM Transactions on Reconfigurable Technology and Systems. 8:1-24
The increasing usage of hardware accelerators such as Field-Programmable Gate Arrays (FPGAs) and Graphics Processing Units (GPUs) has significantly increased application design complexity. Such complexity results from a larger design space created by
Autor:
Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger
Publikováno v:
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 9:1-21
Recent architectural trends have focused on increased parallelism via multicore processors and increased heterogeneity via accelerator devices (e.g., graphics-processing units, field-programmable gate arrays). Although these architectures have signif
Publikováno v:
Hot Chips Symposium
This article consists of a collection of slides from the authors' conference presentation. Are FPGAs a Promising Target in the Datacenter for Deep Learning? Yes.
Autor:
Adrian Caulfield, Eric Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Stephen Heil, Joo-Young Kim, Daniel Lo, Michael Papamichael, Todd Massengill, Derek Chiou, Doug Burger
Publikováno v:
IEEE Micro. :1-1