Zobrazeno 1 - 10
of 49
pro vyhledávání: '"Jeoung Woo Kim"'
Autor:
Moon Soo Park, Jihye Kim, Jae Keun Oh, Young-Woo Kim, Tae-Hwan Kim, Ho Suk Kang, Seok Woo Kim, Jeoung Woo Kim
Publikováno v:
Scientific Reports, Vol 9, Iss 1, Pp 1-9 (2019)
Scientific Reports
Scientific Reports
Early diagnosis and proper treatment of pyogenic vertebral osteomyelitis (PVO) in patients with cirrhosis is challenging to clinicians, and the mortality rate is expected to be high. A retrospective study was conducted to investigate the treatment ou
Publikováno v:
Korean Journal of Materials Research. 29:43-51
Publikováno v:
Journal of neurological surgery. Part A, Central European neurosurgery.
Vitamin K antagonists have been frequently prescribed as anticoagulants with the potential side effect of spontaneous hematomyelia with a poor prognosis. However, to our knowledge, there has been no report of spontaneous hematomyelia combined with th
Autor:
Yang-Kyu Choi, Hee-Jeong Hong, Dong-Il Moon, Jee-Yeon Kim, Hyunjae Jang, Choong-Ki Kim, Jae-Sub Oh, Jeoung-Woo Kim, Minho Kang
Publikováno v:
IEEE Electron Device Letters. 35:1236-1238
A trigate FinFET with a charge trap gate dielectric is demonstrated for high-speed and long retention memory applications. For a capacitor-less dynamic memory cell, a nitride layer is utilized as a charge storage node and it is directly formed on a s
Autor:
Jeoung Woo Kim, Jie Yang, Xinfeng Liu, Yujian He, Xiaohui Qiu, Rui Song, Zhiyong Tang, Shanliang Zheng, Chi Won Ahn, Yunlong Zhou
Publikováno v:
Chemistry of Materials. 21:3177-3182
In this study a self-reorganization strategy is applied to prepare near-infrared Hg1−xCdxTe nanowire networks. CdTe nanoparticles (NPs) self-reorganized into Hg1−xCdxTe nanowire networks by taking advantage of the synergic effect of chemical repl
Autor:
Jin-Woo Han, Gi-Sung Lee, Jae-Sub Oh, Yang-Kyu Choi, Jeoung Woo Kim, Seong-Wan Ryu, Jin Soo Kim, Chung-Jin Kim, Kwang Hee Kim, Sung-Jin Choi, Sungho Kim, Meyong-Ho Song, Yun Chang Park
Publikováno v:
IEEE Transactions on Electron Devices. 56:601-608
This paper investigates how gate height (Hg), which refers to the size of a floating-body, affects the program efficiency and retention characteristics of one-transistor DRAM (1T-DRAM) and nonvolatile memory (NVM) for a FinFET SONOS device that has a
Autor:
Jae-Hyuk Ahn, Gi-Sung Lee, Chung-Jin Kim, Dong-Hyun Kim, Jae-Sub Oh, Kwang Hee Kim, Seong-Wan Ryu, Kyu Jin Choi, Yang-Kyu Choi, Yun Chang Park, Byung Jin Cho, Jin-Woo Han, Sung-Jin Choi, Myeong-Ho Song, Jeoung Woo Kim, Sungho Kim, Jin-Soo Kim
Publikováno v:
IEEE Transactions on Electron Devices. 56:641-647
A band-offset-based unified-RAM (URAM) cell fabricated on a Si/Si1-yCy substrate is presented for the fusion of a nonvolatile memory (NVM) and a capacitorless 1T-DRAM. An oxide/nitride/oxide (O/N/O) gate dielectric and a floating-body are combined in
Autor:
Jae Sub Oh, Yun Chang Park, Kwang Hee Kim, Myeong Ho Song, Jeoung Woo Kim, Moongyu Jang, Gi Sung Lee, Yang-Kyu Choi, Jin-Woo Han, Jin Soo Kim, Sung-Jin Choi
Publikováno v:
IEEE Electron Device Letters. 30:265-268
A dopant-segregated Schottky barrier (DSSB) FinFET silicon-oxide-nitride-oxide-silicon (SONOS) for nor-type flash memory is successfully demonstrated. Compared with a conventional FinFET SONOS device, the DSSB FinFET SONOS device exhibits high-speed
Autor:
Jin Soo Kim, Moongyu Jang, Jin-Woo Han, Yun Chang Park, Jeoung Woo Kim, Myeong Ho Song, Yang-Kyu Choi, Sungho Kim, Jae Sub Oh, Kwang Hee Kim, Gi Sung Lee, Sung-Jin Choi
Publikováno v:
IEEE Electron Device Letters. 30:78-81
A dopant-segregated (DS) Schottky-barrier (DSSB) FinFET SONOS for NAND flash memory with a proposed architecture is demonstrated for the first time. A DSSB technique with a nickel-silicided source/drain (S/D) is integrated in the FinFET with a 30-50-
Autor:
Jee-Yeon Kim, Gi-Sung Lee, Yang-Kyu Choi, Jae-Sub Oh, Chung-Jin Kim, Dong-Il Moon, Jin-Woo Han, Jin-Seong Lee, Yun-Chang Park, Dongwook Lee, Young-Su Kim, Sung-Jin Choi, Dae-Won Hong, Jeoung-Woo Kim
Publikováno v:
IEEE Electron Device Letters. 32:452-454
A gate length of 25 nm and a silicon nanowire (SiNW) with a width of 6 nm and a height of 10 nm fully surrounded by a gate are demonstrated. A suspended SiNW, which is fully depleted, is fabricated on a bulk substrate by employing the deep reactive-i