Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Jennifer V. Muncy"'
Autor:
Christine Bunke, John H. Zhang, J.P. Zheng, Jennifer V. Muncy, Wei-Tsu Tseng, Qiang Fang, Leo Tai, Vamsi Devarapalli, Laertis Economikos, Donald F. Canaperi, James MacDougal, Matthew Angyal, Xiaomeng Chen, Adam Ticknor
Publikováno v:
2012 SEMI Advanced Semiconductor Manufacturing Conference.
Optimization of post Cu CMP cleaning performance can be accomplished through dilution ratio tuning and pad rinse of clean chemicals. Excessive chemical etching as well as megasonic power can induce high Cu roughness. Generation of hollow metal and Cu
Autor:
Laertis Economikos, Cindy Goldberg, R. Murphy, Qiang Fang, J.P. Zheng, John H. Zhang, Tsong L. Leo Tai, Xiaomeng Chen, Jennifer V. Muncy, Eric G. Liniger, Ben Kim, Donald F. Canaperi, Chao-Kun Hu, Lin Yang, Ron Sampson, Michael F. Lofaro, Wei-Tsu Tseng, Walter Kleemeier
Publikováno v:
MRS Proceedings. 1428
The challenges associated with meeting 20nm technology requirements for better Cu CMP process uniformity and lower defectivity have been studied. Required improvements in uniformity were obtained through platen process optimization along with evaluat
Publikováno v:
2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).
The following details a new test methodology offered as a cost effective alternative to module form-factor testing for detecting the delamination fail mode observed in Multiterminal low inductance capacitors (MTLICs) under temperature humidity bias (
Publikováno v:
2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).
The influence of Green initiatives and resulting reduction in power consumption have an impact on module reliability. In this paper we will discuss an approach that IBM is using to acquire and save cyclic field data from processors as well as the tes
Autor:
Jennifer V. Muncy, Jeffrey Thomas Coffin, Michael C. Triplett, Joseph C. Ross, Charles L. Arvin, Wolfgang Sauter, Sylvain Ouimet
Publikováno v:
2009 59th Electronic Components and Technology Conference.
Multi-terminal low inductance capacitors (MTLICs) are used widely throughout the electronics industry to aid with voltage noise suppression and to manage high speed switching currents. They are implemented on system level cards as well as microproces
Autor:
Jennifer V. Muncy, Isabelle Depatie, Virendra R. Jadhav, Thomas A. Wassick, Jon A. Casey, Kenneth C. Marston, Sylvain Ouimet, John S. Corbin
Publikováno v:
2008 58th Electronic Components and Technology Conference.
For many years, the Flip Chip Plastic Ball Grid Array (FC-PBGA) has been the preferred packaging solution for microprocessors and high performance ASICs. IBM has developed a dual chip Flip Chip Plastic Land Grid Array (FC- PLGA) package to support lo
Autor:
Conal E. Murray, Ian D. Melville, Matthew Angyal, Xiao Hu Liu, Jennifer V. Muncy, Vincent J. McGahay, Henry A. Nye, Charles F. Carey, Mukta G. Farooq, M. Cullinan-Scholl, Robert Hannon, Michael Lane, David L. Questad, T. Shaw, Wolfgang Sauter, Christopher D. Muzzy, P.V. McLaughlin
Publikováno v:
2007 IEEE International Interconnect Technology Conferencee.
This paper discusses the chip package interaction (CPI) for a 65 nm low k BEOL CMOS chip assembled to an organic package. Inter-level dielectrics with k~3.0 and k~2.7, with oxide terminations, were used in combination with both Sn/Pb and lead-free C4
Publikováno v:
2007 Proceedings 57th Electronic Components and Technology Conference.
Flip-chip packages have become the preferred solution for high-performance ASIC and microprocessor devices. Typically these are packaged in organic or ceramic ball grid array (BGA) connections. Recently, there has been a significant focus on Pb-free