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Publikováno v:
EURASIP Journal on Embedded Systems, Vol 2006, Iss 1, p 048085 (2006)
EURASIP Journal on Embedded Systems, Vol 2006 (2006)
EURASIP Journal on Embedded Systems, Vol 2006 (2006)
This paper examines the design of an FPGA-based system-on-a-chip capable of performing continuous speech recognition on medium sized vocabularies in real time. Through the creation of three dedicated pipelines, one for each of the major operations in