Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Jeff Setter"'
Autor:
Qiaoyi Liu, Jeff Setter, Dillon Huff, Maxwell Strange, Kathleen Feng, Mark Horowitz, Priyanka Raina, Fredrik Kjolstad
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 20:1-26
Image processing and machine learning applications benefit tremendously from hardware acceleration. Existing compilers target either FPGAs, which sacrifice power and performance for programmability, or ASICs, which become obsolete as applications cha
Autor:
Kalhan Koul, Jackson Melchert, Kavya Sreedhar, Leonard Truong, Gedeon Nyengele, Keyi Zhang, Qiaoyi Liu, Jeff Setter, Po-Han Chen, Yuchen Mei, Maxwell Strange, Ross Daly, Caleb Donovick, Alex Carsello, Taeyoung Kong, Kathleen Feng, Dillon Huff, Ankita Nayak, Rajsekhar Setaluri, James Thomas, Nikhil Bhagdikar, David Durst, Zachary Myers, Nestan Tsiskaridze, Stephen Richardson, Rick Bahr, Kayvon Fatahalian, Pat Hanrahan, Clark Barrett, Mark Horowitz, Christopher Torng, Fredrik Kjolstad, Priyanka Raina
Publikováno v:
ACM Transactions on Embedded Computing Systems. 22:1-34
With the slowing of Moore’s law, computer architects have turned to domain-specific hardware specialization to continue improving the performance and efficiency of computing systems. However, specialization typically entails significant modificatio
Autor:
Kathleen Feng, Alex Carsello, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina
Publikováno v:
2022 IEEE Hot Chips 34 Symposium (HCS).
Autor:
Alex Carsello, Kathleen Feng, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Autor:
Raj Setaluri, Kathleen Feng, Nestan Tsiskaridze, Taeyoung Kong, Jeff Setter, Aina Niemetz, Christopher Torng, Keyi Zhang, Teguh Hofstee, Ross Daly, Mark Horowitz, Maxwell Strange, Qiaoyi Liu, Ankita Nayak, Rick Bahr, Priyanka Raina, Caleb Donovick, David Durst, Stephen Richardson, Gedeon Nyengele, Fredrik Kjolstad, Kavya Sreedhar, Clark Barrett, Leonard Truong, Pat Hanrahan, Alex Carsello, James J. Thomas, Kayvon Fatahalian, Dillon Huff, Makai Mann, Nikhil Bhagdikar, Jackson Melchert
Publikováno v:
DAC
Although an agile approach is standard for software design, how to properly adapt this method to hardware is still an open question. This work addresses this question while building a system on chip (SoC) with specialized accelerators. Rather than us
Autor:
Steven Bell, Jeff Setter, Jonathan Ragan-Kelley, Stephen Richardson, Mark Horowitz, Jing Pu, Xuan Yang
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 14:1-25
Specialized image processing accelerators are necessary to deliver the performance and energy efficiency required by important applications in computer vision, computational photography, and augmented reality. But creating, “programming,” and int
Autor:
Qiaoyi Liu, Heonjae Ha, Priyanka Raina, Mark Horowitz, Mingyu Gao, Christos Kozyrakis, Jeff Setter, Kaidi Cao, Jing Pu, Ankita Nayak, Steven Bell, Xuan Yang
Publikováno v:
ASPLOS
We show that DNN accelerator micro-architectures and their program mappings represent specific choices of loop order and hardware parallelism for computing the seven nested loops of DNNs, which enables us to create a formal taxonomy of all existing d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8d295b569dccf299785496b7053c9574
http://arxiv.org/abs/1809.04070
http://arxiv.org/abs/1809.04070
Publikováno v:
HPCA
Performance isolation is an important goal in server-class environments. Partitioning the last-level cache of a chip multiprocessor (CMP) across co-running applications has proven useful in this regard. Two popular approaches are (a) hardware support