Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Jeckson Dellagostin Souza"'
Autor:
Antonio Carlos Schneider Beck, Arthur Francisco Lorenzon, Charles Cardoso De Oliveira, Jeckson Dellagostin Souza
Publikováno v:
IEEE Transactions on Parallel and Distributed Systems. 30:1007-1021
Efficiently exploiting thread-level parallelism has been challenging for software developers. As many parallel applications do not scale with the number of cores, the task of rightly choosing the ideal amount of threads to produce the best results in
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
Modern GPPs implement specialized instructions in the form of ISA extensions aiming to increase the performance of emerging applications. These extensions impose a significant overhead in the area and power of the processor because of their specific
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5f5167807db2f1aac72d32be922f3d0a
http://hdl.handle.net/2117/349253
http://hdl.handle.net/2117/349253
Publikováno v:
DATE
Heterogeneous MPSoCs are crucial to meeting energy efficiency and performance, given their combination of cores and accelerators. In this work, we propose a novel technique for MPSoCs design, increasing their specialization and task-parallelism withi
Autor:
Jeckson Dellagostin Souza, Antonio Carlos Schneider Beck, Madhavan Manivannan, Miquel Pericas
Publikováno v:
DATE
Asymmetric multicore architectures with single-ISA can accelerate multithreaded applications by running code that does not execute concurrently (i.e., the serial region) on a big core and the parallel region on a larger number of smaller cores. Never
Autor:
Marcelo Brandalero, Antonio Carlos Schneider Beck, Jeckson Dellagostin Souza, Leonardo Almeida da Silveira
Publikováno v:
Science of Computer Programming. 165:54-67
Function reuse is a promising approach to accelerate single-threaded applications and exceed the limits of instruction-level parallelism. This approach exploits the observation that certain functions are executed several times with the same inputs, p
Publikováno v:
ICECS
Heterogeneous MPSoCs are key to meeting energy efficiency and performance under constrained scenarios since different cores and accelerators are combined. In this work, we propose a novel approach to expand MPSoCs' design space. By removing the micro
Autor:
Anderson L. Sartor, Monica Magalhães Pereira, Jeckson Dellagostin Souza, Augusto Erichsen, Stephan Wong, Antonio Carlos Schneider Beck
Publikováno v:
Applied Reconfigurable Computing. Architectures, Tools, and Applications ISBN: 9783319788890
ARC
ARC
The well-known Triple Modular Redundancy (TMR), when applied to processors to mitigate the occurrence of faults, implies that all applications have the same level of criticality (since they are all equally protected) and are executed in a homogeneous
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::25075bf73e00a5bf0370181bb23e4604
https://doi.org/10.1007/978-3-319-78890-6_19
https://doi.org/10.1007/978-3-319-78890-6_19
Autor:
Anderson L. Sartor, Jeckson Dellagostin Souza, Stephan Wong, Luigi Carro, Mateus Beck Rutzig, Antonio Carlos Schneider Beck
Publikováno v:
Applied Reconfigurable Computing. Architectures, Tools, and Applications ISBN: 9783319788890
ARC
ARC
Embedded processors must efficiently deliver performance at low energy consumption. Both configurable and reconfigurable techniques can be used to fulfill such constraints, although applied in different situations. In this work, we propose DIM-VEX, a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::57cd4cd4af5e3bdaa0f53d4b2566bf33
https://doi.org/10.1007/978-3-319-78890-6_30
https://doi.org/10.1007/978-3-319-78890-6_30
Autor:
Antonio Carlos Schneider Beck, Rafael Fao de Moura, Jeckson Dellagostin Souza, Michael Guilherme Jordan, Josimar Sfreddo, Mateus Beck Rutzig
Publikováno v:
ISCAS
Heterogeneous MPSoCs are vastly used in current embedded systems but they are highly dependent on special compilers. Dynamic reconfigurable systems are an alternative to overcome such drawback due to their adaptability. However, when such architectur
Publikováno v:
DATE
Efficiently exploiting thread level parallelism from new multicore systems has been challenging for software developers. While blindly increasing the number of threads may lead to performance gains, it can also result in disproportionate increase in