Zobrazeno 1 - 10
of 40
pro vyhledávání: '"Jean-Luc Beuchat"'
Publikováno v:
ENTRENOVA-ENTerprise REsearch InNOVAtion
Volume 6
Issue 1
Volume 6
Issue 1
In this paper, we describe an ongoing project to assess the liquidity risk of small and medium enterprises (SMEs) in a network. In doing so we try to mimic the tracing applications that have been done to Covid-19. We built a simple artefact under the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::2be753b53d536c592e3c3ade7fc9cc50
https://proceedings.entrenova.org/entrenova/article/view/333
https://proceedings.entrenova.org/entrenova/article/view/333
Publikováno v:
IEEE transactions on circuits and systems. I, Regular papers. 61(2):485-498
WOS: 000331191800015
The cryptographic hash functions BLAKE and Skein are built from the ChaCha stream cipher and the tweakable Threefish block cipher, respectively. Interestingly enough, they are based on the same arithmetic operations, and the
The cryptographic hash functions BLAKE and Skein are built from the ChaCha stream cipher and the tweakable Threefish block cipher, respectively. Interestingly enough, they are based on the same arithmetic operations, and the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c53e50ba2eb843bc7400a014462f64f4
https://tsukuba.repo.nii.ac.jp/records/29539
https://tsukuba.repo.nii.ac.jp/records/29539
Autor:
Jean-Luc Beuchat, Luis J. Dominguez Perez, Laura Fuentes-Castaneda, Francisco Rodriguez-Henriquez
Publikováno v:
Guide to Pairing-Based Cryptography ISBN: 9781315370170
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::62f22557b7df7d6e933a981da1d19cc1
https://doi.org/10.1201/9781315370170-7
https://doi.org/10.1201/9781315370170-7
WOS: 000402022500008
This article describes the design of a compact 8-bit coprocessor for the Advanced Encryption standard (AES) (encryption, decryption, and key expansion) and the cryptographic hash function Grostl. Our Arithmetic and Logic Uni
This article describes the design of a compact 8-bit coprocessor for the Advanced Encryption standard (AES) (encryption, decryption, and key expansion) and the cryptographic hash function Grostl. Our Arithmetic and Logic Uni
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::475bdb826079cd4420eb5a19ef46e3ed
https://hdl.handle.net/11421/20272
https://hdl.handle.net/11421/20272
Publikováno v:
Journal of Cryptographic Engineering. 1:101-121
We propose a compact coprocessor for the AES (encryption, decryption, and key expansion) and the cryptographic hash function ECHO on Virtex-5 and Virtex-6 FPGAs. Our architecture is built around an 8-bit datapath. The Arithmetic and Logic Unit perfor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f5f4c5a4638fb47acb4258329118356
https://doi.org/10.1007/s13389-011-0009-8
https://doi.org/10.1007/s13389-011-0009-8
Autor:
Eiji Okamoto, Yamamoto Hiroyasu, Hiroshi Doi, Akira Kanaoka, Atsuo Inomata, Masayoshi Katouno, Masaaki Shirase, Ananda Vithanage, Kaoru Fujita, Takeshi Okamoto, Takaaki Shiga, Ryuji Soga, Piseth Ith, Jean-Luc Beuchat, Masahiro Mambo, Tsuyoshi Takagi
Publikováno v:
Computers & Electrical Engineering. 36:73-87
Since their introduction in constructive cryptographic applications, pairings over (hyper)elliptic curves are at the heart of an ever increasing number of protocols. As they rely critically on efficient implementations of pairing primitives, the stud
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22fd723d8efdcb8ecef59aabf6d6711d
https://doi.org/10.1016/j.compeleceng.2009.05.001
https://doi.org/10.1016/j.compeleceng.2009.05.001
Autor:
Jean-Michel Muller, Jean-Luc Beuchat
Publikováno v:
IEEE Transactions on Computers
IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2008, 57 (12), pp.1600-1613. ⟨10.1109/TC.2008.102⟩
IEEE Transactions on Computers, 2008, 57 (12), pp.1600-1613. ⟨10.1109/TC.2008.102⟩
IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2008, 57 (12), pp.1600-1613. ⟨10.1109/TC.2008.102⟩
IEEE Transactions on Computers, 2008, 57 (12), pp.1600-1613. ⟨10.1109/TC.2008.102⟩
application/pdf
Since redundant number systems allow constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed, PKC involves large operands (160 to 1024 bits) and s
Since redundant number systems allow constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed, PKC involves large operands (160 to 1024 bits) and s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::10df2bfbb51f3743cd390f9b54422c51
https://doi.org/10.1109/tc.2008.102
https://doi.org/10.1109/tc.2008.102
Publikováno v:
International Journal of Electronics. 95:669-684
This paper aims at surveying multipliers based on Horner's rule for finite field arithmetic. We present a generic architecture based on five processing elements and introduce a classification of several algorithms based on our model. We provide the r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::76f4e4d9a0656e91e0f9d51f63513071
https://doi.org/10.1080/00207210801924099
https://doi.org/10.1080/00207210801924099
Publikováno v:
IEEE Symposium on Computer Arithmetic
In this paper, we propose a modified etaT pairing algorithm in characteristic three which does not need any cube root extraction. We also discuss its implementation on a low cost platform which hosts an Altera Cyclone II FPGA device. Our pairing acce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::aa574af50a67d26bf6b1af758fe73e64
http://hdl.handle.net/10445/4866
http://hdl.handle.net/10445/4866
Autor:
Arnaud Tisserand, Jean-Luc Beuchat
Publikováno v:
Techniques et sciences informatiques. 23:1247-1267
Cet article presente une architecture materielle pour l'evaluation de fonctions elementaires en arithmetique en-ligne sur circuits FPGA. Les points particuliers traites sont la determination automatique de " bons " polynomes d'approximation, et la ge
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef977caf7565712bd53a4012f9b86eda
https://doi.org/10.3166/tsi.23.1247-1267
https://doi.org/10.3166/tsi.23.1247-1267