Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Jean Michailos"'
Publikováno v:
ESSDERC
Increasing the density and functionalities of chips in the third dimension, 3D Integration (3DI), is now being applied for imaging type devices. We will review the various advantages and embodiments of 3DI for imaging sensors. The advantages and also
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3a802ac1066821d9af19773c0b2844c1
https://doi.org/10.1109/essderc.2019.8901809
https://doi.org/10.1109/essderc.2019.8901809
Autor:
Didier Campos, P. Coudrain, Yorrick Exbrayat, Lucile Arnaud, Stephane Minoret, F. Ponthenier, Andrea Vinci, Severine Cheramy, Alain Gueugnot, Daniel Scevola, Cesar Fuguet Tortolero, P. Chausse, Roselyne Segaud, Giovanni Romano, Christophe Aumont, Didier Lattard, Jean Charbonnier, Pierre-Emile Philip, C. Ribiere, Arnaud Garnier, Jean Michailos, Mathilde Gottardi, Raphael Eleouet, Frédéric Berger, Eric Guthmuller, Gilles Simon, Jerome Beltritti, Gilles Romero, Maxime Argoud, Denis Dutoit, Alexis Farcy, Nacima Allouti, Therry Mourier, Remi Velard, Pascal Vivet, Corinne Legalland
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
We report the first successful technology integration of chiplets on an active silicon interposer, fully processed, packaged and tested. Benefits of chiplet-based architectures are discussed. Built up technology is presented and focused on 3D interco
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d8afe955b96b263c988971d8f1f91372
https://doi.org/10.1109/ectc.2019.00092
https://doi.org/10.1109/ectc.2019.00092
Autor:
R. Prieto, Pascal Vivet, Jean Michailos, G. Savelli, Louis-Michel Collin, Jean-Philippe Colonna, H. Beckrich-Ros, Montse Vilarrubí, Julie Widiez, Perceval Coudrain, Luc G. Fréchette, K. Triantopoulos, M. Shirazi, Jérôme Barrau, Kremena Vladimirova, Q. Struss, Hassan Azarkish, Gerard Laguna
Publikováno v:
2018 IEEE Symposium on VLSI Technology
2018 IEEE Symposium on VLSI Technology, Jun 2018, Honolulu, France. pp.15-16, ⟨10.1109/VLSIT.2018.8510677⟩
2018 IEEE Symposium on VLSI Technology, Jun 2018, Honolulu, France. pp.15-16, ⟨10.1109/VLSIT.2018.8510677⟩
This paper describes evolutions of circuit environment to face an ever-increasing thermal challenge, from early design stage down to the final package. To illustrate this critical concern we give a portrayal of innovative technologies and concepts st
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4c87c9d7139d2ebf0c281c3203a3ab34
https://hal.archives-ouvertes.fr/hal-02073365
https://hal.archives-ouvertes.fr/hal-02073365
Autor:
Arnaud Garnier, Gael Pillonnet, R. Segaud, A. Jouve, Pascal Vivet, H. Jacquinot, Alexandre Arriordaz, Fabrice Casset, S. Cheramy, Jean Michailos, N. Bresson, Lucile Arnaud, C. Chantre, Sandrine Lhostis, Didier Lattard, K. Azizi-Mourier, Franck Bana, Alexis Farcy, F. Ponthenier, Stephane Moreau
Publikováno v:
3DIC
System integration takes benefit from 3D stacking technology in a wide range of applications such as smart imagers, photonic, wide I/O memories and high-performance computing. The 700 mm2 ITAC 3D integration test platform contains a set of “Integra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4ac47b44bc67ee68419cc616a78d7787
https://doi.org/10.1109/3dic.2016.7970012
https://doi.org/10.1109/3dic.2016.7970012
Autor:
Juergen Schloeffel, Cristiano Santos, Alexandre Arriordaz, Lee Wang, Yvain Thonnart, Christian Bernard, Eric Flamand, Abbas Sheibanyrad, Frédéric Pétrot, Fabien Clermidy, S. Cheramy, Edith Beigne, Romain Lemaire, Denis Dutoit, Pascal Vivet, Didier Lattard, Florian Darve, Ivan Miro-Panades, Jean Michailos
Publikováno v:
IEEE Journal of Solid-State Circuits
IEEE Journal of Solid-State Circuits, 2016, 52 (1), pp.33-49. ⟨10.1109/JSSC.2016.2611497⟩
IEEE Journal of Solid-State Circuits, Institute of Electrical and Electronics Engineers, 2016, 52 (1), pp.33-49. ⟨10.1109/JSSC.2016.2611497⟩
IEEE Journal of Solid-State Circuits, 2016, 52 (1), pp.33-49. ⟨10.1109/JSSC.2016.2611497⟩
IEEE Journal of Solid-State Circuits, Institute of Electrical and Electronics Engineers, 2016, 52 (1), pp.33-49. ⟨10.1109/JSSC.2016.2611497⟩
International audience; Future many cores, either for high performance computing or for embedded applications, are facing the powerwall, and cannot be scaled up using only the reduction of technology nodes; 3D integration, using through siliconvia (T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::74c17aea1b2ae9d9edf7df966c526039
https://hal.sorbonne-universite.fr/hal-01447433
https://hal.sorbonne-universite.fr/hal-01447433
Autor:
Jean Michailos, Didier Lattard, Cristiano Santos, Yvain Thonnart, Fabien Clermidy, Romain Lemaire, Frédéric Pétrot, Severine Cheramy, Ivan Miro-Panades, Florian Darve, Christian Bernard, Pascal Vivet, Eric Flamand, Edith Beigne
Publikováno v:
ISSCC
By shortening communication distance across dies, 3D technologies are a key to continued improvements in computing density. For 4G telecom baseband processing, specific computing units arranged in a regular network-on-chip (NoC) array provide power-e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::540d860c3ea21de6df8230acedb6237a
https://doi.org/10.1109/isscc.2016.7417949
https://doi.org/10.1109/isscc.2016.7417949
Autor:
Claire Fenouillet-Beranger, E. Saugier, Vincent Fiori, E. Deloffre, A. Jouve, Alexis Farcy, Francois Guyader, N. Hotellier, Laurent Brunet, Severine Cheramy, Pascal Vivet, Perrine Batude, F. Breuf, F. Ponthenier, Sandrine Lhostis, R. Prieto, Jean-Philippe Colonna, Maud Vinet, Yann Henrion, Perceval Coudrain, Yannick Sanchez, L. Benaissa, R. Velard, Fabrice Casset, Jean Michailos, B. Vianne, L.-M. Collin
Publikováno v:
2015 IEEE International Electron Devices Meeting (IEDM).
From low density 3D integrations embedding Via Last Through Silicon Vias (TSV) to high densities hybrid bonding or 3D VSLI CoolCubeTM solutions, a multitude of new product opportunities is now envisioned. An overview of existing emerging 3D integrati
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fe649aefb83879dc2cbb1ccdf91a205e
https://doi.org/10.1109/iedm.2015.7409655
https://doi.org/10.1109/iedm.2015.7409655
Autor:
Dorleta Cortaberria Sanz, Gilles Metellus, Francois Guyader, Dave Thomas, Yiping Song, Keith Buchanan, Alain Inard, Tony Wilby, Jean Michailos, N. Hotellier
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2010:000539-000556
One of the first device types to benefit from TSV implementation is the CMOS image sensor, an image capture device designed to combine high image quality within a compact form-factor that can be mass produced at low cost. End markets include mobile p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d543386ea055fdb7c416f626d8876f09
https://doi.org/10.4071/2010dpc-ta14
https://doi.org/10.4071/2010dpc-ta14
Autor:
F. de Crecy, Papa Momar Souare, J. Pruvost, Clement Tavernier, Perceval Coudrain, S. Dumas, Bastien Giraud, Alexis Farcy, H. Ben-Jamaa, Jean Michailos, N. Hotellier, L. Le Pailleur, András Borbély, C. Chancel, J.-M. Riviere, R. Franiatte, Sebastien Gallois-Garreignot, Vincent Fiori, C. Laviron, Jean-Philippe Colonna, Severine Cheramy
Publikováno v:
2014 IEEE International Electron Devices Meeting.
We present an advanced and comprehensive platform for thermal dissipation studies in TSV-based 3D ICs. A 2-tier 3D test chip with through silicon via (TSV) and μ-bump is used for thermal characterization with unprecedented precision and design explo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::97a14ba8c0911fe1c139fec8cca2e7cc
https://doi.org/10.1109/iedm.2014.7047175
https://doi.org/10.1109/iedm.2014.7047175
Autor:
C. Laviron, Sebastien Gallois-Garreignot, Perceval Coudrain, S. Cheramy, Alexis Farcy, Jean-Philippe Colonna, Vincent Fiori, Papa Momar Souare, Clement Tavernier, F. de Crecy, Jean Michailos, András Borbély, H. Ben Jamaa, Bastien Giraud
Publikováno v:
3DIC
This paper presents a comparison between electrical measurements, which are carried out with embedded in-situ sensors, and thermal numerical simulations. The objectives of this study are firstly to calibrate the Finite Element model by comparing the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1d7fb14d354ef64c0baf1e77be1f1f1a
https://doi.org/10.1109/3dic.2013.6702362
https://doi.org/10.1109/3dic.2013.6702362