Zobrazeno 1 - 10
of 95
pro vyhledávání: '"Jang Gn Yun"'
Autor:
Jang-Gn Yun, Seongjae Cho, Jong-Ho Lee, Il Han Park, Gil Sung Lee, Won-Bo Shim, Wandong Kim, Se Hwan Park, Junghoon Lee, Yoon Kim, Doo-Hyun Kim, Byung-Gook Park, Dong Hua Li, Hyungcheol Shin
Publikováno v:
Nanoscience and Nanotechnology Letters. 7:594-598
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f14080378426faf701d3414987866125
https://doi.org/10.1166/nnl.2015.2002
https://doi.org/10.1166/nnl.2015.2002
Autor:
Jang-Gn Yun1 jgyun7@snu.ac.kr, Jong Duk Lee1 jdlee@snu.ac.kr, Byung-Gook Park1 bgpark@snu.ac.kr
Publikováno v:
IETE Technical Review. 2009, Vol. 26 Issue 4, p247-257. 11p. 6 Diagrams, 1 Chart, 8 Graphs.
Autor:
Jang-Gn Yun, Hyungcheol Shin, Byung-Gook Park, Myoung-Sun Lee, Jong-Ho Lee, Sangsik Park, Sung-Min Joe
Publikováno v:
JSTS:Journal of Semiconductor Technology and Science. 12:360-369
The causes of showing different subthreshold slopes (SS) in programmed and erased states for two different charge trap flash (CTF) memory devices, SONOS type flash memory with gate-all-around (GAA) structure and TANOS type NAND flash memory with plan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::91f867ec28594d4457a8c4967d3b3bbd
https://doi.org/10.5573/jsts.2012.12.3.360
https://doi.org/10.5573/jsts.2012.12.3.360
Autor:
Jong-Ho Lee, Wandong Kim, Kyung-Chang Ryoo, Hyungcheol Shin, Jeong-Hoon Oh, Yoon Kim, Byung-Gook Park, Jang-Gn Yun, Se Hwan Park, Joo Yun Seo, Myounggon Kang
Publikováno v:
IEEE Transactions on Electron Devices. 59:35-45
Various critical issues related with 3-D stacked nand Flash memory are examined in this paper. Our single-crystalline STacked ARray (STAR) has many advantages such as better scalability, possibility of single-crystal channel, less sensitivity to 3-D
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::439eedd15dc12010a126b851a7700307
https://doi.org/10.1109/ted.2011.2170841
https://doi.org/10.1109/ted.2011.2170841
Publikováno v:
Solid-State Electronics. 64:42-46
A new stacked-nanowire device is proposed for 3-dimensional (3D) NAND flash memory application. Two single-crystalline Si nanowires are stacked in vertical direction using epitaxially grown SiGe/Si/SiGe/Si/SiGe layers on a Si substrate. Damascene gat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4c2d8375497759ce28463b54913cd7fa
https://doi.org/10.1016/j.sse.2011.07.003
https://doi.org/10.1016/j.sse.2011.07.003
Publikováno v:
IEEE Transactions on Electron Devices. 58:1892-1897
A novel electrical layer-selection method in a bit-line stacked 3-D nand memory array is proposed. The stacked layers are selected by using multiple source select lines with erased cells in a layer. The operation scheme and simulation results for the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0715f409611edee7e316af2d0212930d
https://doi.org/10.1109/ted.2011.2142417
https://doi.org/10.1109/ted.2011.2142417
Autor:
Garam Kim, Jong-Ho Lee, Yoon Kim, Joung-Eob Lee, Wonbo Shim, Byung-Gook Park, Hyungcheol Shin, Jang-Gn Yun, Jong Duk Lee
Publikováno v:
IEEE Transactions on Electron Devices. 58:1006-1014
In this paper, a 3-D NAND Flash memory array having multiple single-crystal Si nanowires is investigated. Device structure and fabrication process are described including the electrical isolation of stacked nanowires. Numerical simulation results foc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b531e6944ab6ff40e5f0c63c25e51ba
https://doi.org/10.1109/ted.2011.2107557
https://doi.org/10.1109/ted.2011.2107557
Autor:
Seongjae Cho, Jong Duk Lee, Jong-Ho Lee, Jang-Gn Yun, Byung-Gook Park, Hyungcheol Shin, Wonbo Shim, Yoon Kim
Publikováno v:
IEEE Transactions on Electron Devices. 58:288-295
A charge trap folded NAND (FNAND) Flash memory device with band-gap-engineered (BE) storage node is proposed. Because of the compact cell layout without junction contacts, a NAND Flash memory is the most suitable memory medium for electronic applianc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2df1aace2e13a21524a0b89013016b26
https://doi.org/10.1109/ted.2010.2090420
https://doi.org/10.1109/ted.2010.2090420
Publikováno v:
Solid-State Electronics. 55:37-43
A three-dimensional (3D) stacked bit-line NAND flash memory is investigated. The fabrication process flow for the formation of a laterally-recessed bit-line stack is described. Program operation is simulated using a stacked bit-line structure. Inter-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::829ff09978e37b3e84afd6724cc8cb14
https://doi.org/10.1016/j.sse.2010.07.019
https://doi.org/10.1016/j.sse.2010.07.019
Publikováno v:
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films. 28:675-678
The authors investigate the scaling behaviors of a silicon-nitride layer for use in a charge-trapping memory device according to dimension downscaling of the memory-device cells. As is known, charge storage takes place in discrete traps in the silico
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e1c57ab42721c7700e91adcf2f0c446b
https://doi.org/10.1116/1.3378150
https://doi.org/10.1116/1.3378150