Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Janani Chandrasekhar"'
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
Design of memory I/O channels or general purpose I/O (GPIO) has become very complicated as we aim for higher speeds, higher I/O count and cost-effective solutions. At these speeds, package and die discontinuities cause more deterministic jitter and n
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8c3e6c26b11416f1a6789ec8b29da167
https://doi.org/10.1109/ectc.2016.228
https://doi.org/10.1109/ectc.2016.228
Publikováno v:
2015 IEEE 65th Electronic Components and Technology Conference (ECTC).
As power consumption of modern SOC or FPGA devices continues to increase, meeting electro migration (EM) requirement becomes a significant challenge. The required number of I/O and power balls increases as the device performance and power increase. H
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::04655e134538ae8baa3031d637b2b4a0
https://doi.org/10.1109/ectc.2015.7159675
https://doi.org/10.1109/ectc.2015.7159675
Autor:
Janani Chandrasekhar, Yujeong Shim
Publikováno v:
2014 IEEE International Symposium on Electromagnetic Compatibility (EMC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4a30d30b455d616e0fc14014d9ac1cf3
https://doi.org/10.1109/isemc.2014.6899021
https://doi.org/10.1109/isemc.2014.6899021
Autor:
Janani Chandrasekhar, Yujeong Shim, Cuong Nguyen, Shishuang Sun, Jenny Jiang, Jianmin Zhang, Dan Oh, Yuri Tretiakov
Publikováno v:
2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems.
As data rate increases, crosstalk becomes a significant source of high jitter. Although many techniques have been investigated to reduce crosstalk, it is not possible to fully eliminate coupling. In particular, near-end coupling between transmitter (
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::292e98f10cae3b6d5334f36a68fbf396
https://doi.org/10.1109/epeps.2013.6703504
https://doi.org/10.1109/epeps.2013.6703504
Publikováno v:
2013 IEEE 63rd Electronic Components and Technology Conference.
For single-ended signaling DDR4 channels at 3200Mbps, signal and power integrity issues become increasingly challenging with much smaller voltage and timing windows to balance the budget. As systems increase data rate and IO count, supply noise does
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::398f60ff14d99432d916ad6190226d69
https://doi.org/10.1109/ectc.2013.6575708
https://doi.org/10.1109/ectc.2013.6575708
Publikováno v:
2015 IEEE Symposium on Electromagnetic Compatibility & Signal Integrity; 2015, p1-6, 6p
Publikováno v:
2015 IEEE Symposium on Electromagnetic Compatibility & Signal Integrity; 2015, p1-148, 148p
Publikováno v:
2015 IEEE 65th Electronic Components & Technology Conference (ECTC); 2015, p748-751, 4p
Publikováno v:
2015 IEEE 65th Electronic Components & Technology Conference (ECTC); 2015, p1-36, 36p
Autor:
Chandrasekhar, Janani, Shim, Yujeong
Publikováno v:
2014 IEEE International Symposium on Electromagnetic Compatibility (EMC); 2014, p485-490, 6p