Zobrazeno 1 - 10
of 20
pro vyhledávání: '"Jan Heißwolf"'
Autor:
Thomas Wild, Aurang Zaib, Jan Heisswolf, Andreas Herkersdorf, Jürgen Teich, Jürgen Becker, Andreas Weichslgartner
Publikováno v:
Journal of Systems Architecture. 77:72-82
Modern many-core systems consist of large number of processing cores and introduce more and more parallelism. The (PGAS) programming model is a popular approach for exploiting this parallelism of architectures while offering flexibility of both share
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::963143343587396721a8b796c3e99ad4
https://doi.org/10.1016/j.sysarc.2017.03.004
https://doi.org/10.1016/j.sysarc.2017.03.004
Autor:
Vahid Lari, Stephanie Friederich, Jürgen Teich, Jürgen Becker, Jan Heißwolf, Alexandru Tanase, Andreas Weichslgartner, Faramarz Khosravi, Michael Witterauf
Publikováno v:
it - Information Technology. 58:309-328
As a consequence of technology scaling, today's complex multi-processor systems have become more and more susceptible to errors. In order to satisfy reliability requirements, such systems require methods to detect and tolerate errors. This entails tw
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f089367ced779b107edb7357b588d16
https://doi.org/10.1515/itit-2016-0022
https://doi.org/10.1515/itit-2016-0022
Publikováno v:
Computers & Electrical Engineering. 39:2603-2622
In many-core architectures different distributed applications are executed in parallel. The applications may need hard guarantees for communication with respect to latency and throughput to cope with their constraints. Networks on Chip (NoC) are the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2312cedd5ee48b85249a57083a84e54
https://doi.org/10.1016/j.compeleceng.2013.06.005
https://doi.org/10.1016/j.compeleceng.2013.06.005
Publikováno v:
SBCCI
In this paper we present an interconnect framework for FP-GAs based on multi gigabit transceivers (MGTs), typically available in modern reconfigurable devices. The framework provides higher bandwidth while using fewer pins compared to existing approa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f4081f525660beb7faa9198a04a4239a
https://doi.org/10.1145/2800986.2800993
https://doi.org/10.1145/2800986.2800993
Autor:
Carsten Stein, Marco Duden, Jürgen Becker, Thomas Wild, Leonard Masing, Stephanie Friederich, Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Jürgen Teich, Andreas Herkersdorf, Roman Klopfer
Publikováno v:
AHS
Dependability and fault tolerance will play an ever increasing role when using future technology nodes. The paper presents a fault-tolerance strategy for invasive networks on chip (i-NoC). The strategy focuses on permanent faults, resulting from eith
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::abf12e833e23a7f8b00571de5a92e7c1
https://doi.org/10.1109/ahs.2015.7231156
https://doi.org/10.1109/ahs.2015.7231156
Autor:
Jürgen Becker, Thomas Wild, Jan Heißwolf, Jürgen Teich, Andreas Herkersdorf, Aurang Zaib, Andreas Weichslgartner
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783319160856
ARCS
ARCS
Distributed Shared Memory (DSM) architectures are becoming popular to exploit parallelism of architectures while offering flexibility of using both shared and distributed memory paradigms to application developers. At the same time, Networks on Chip
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::36f38ca120f77d9130162ac962500ee2
https://doi.org/10.1007/978-3-319-16086-3_15
https://doi.org/10.1007/978-3-319-16086-3_15
Publikováno v:
SBCCI
The size of current multi-processor system-on-chip (MPSoC) is growing unsustainable. Besides, new decentralized software approaches are being developed to handle the management of increasing resources. To verify the system functionality of these nove
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ff6fb766e656b3fc17f5dc1fe487cc58
https://doi.org/10.1145/2660540.2661013
https://doi.org/10.1145/2660540.2661013
Autor:
Jorg Henkel, Jan Heisswolf, Sebastian Kobbe, Andreas Zwinkau, Jürgen Becker, Jürgen Teich, Andreas Herkersdorf, Andreas Weichslgartner, Gregor Snelting, Aurang Zaib
Publikováno v:
DAC
Networks on Chip (NoC) come along with increased complexity from the implementation and management perspective. This leads to higher energy consumption and programming complexity of NoC architectures.This work introduces communication aware programmi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ee83eb69fad63bdba02e91225146d5e7
https://doi.org/10.1145/2593069.2593103
https://doi.org/10.1145/2593069.2593103
Publikováno v:
ReConFig
Networks-on-Chip (NoC) are the most promising candidates for scalable communication infrastructures in manycore architectures. To ensure scalability, distributed management of communication resources needs to replace centralized approaches. Hence, di
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4cd7d73ce228235082599217c34ae063
https://doi.org/10.1109/reconfig.2013.6732328
https://doi.org/10.1109/reconfig.2013.6732328
Publikováno v:
SBCCI
Networks on Chip (NoC) have emerged as a promising interconnection technology for scalable many-core architectures. Proposed NoC-architectures and topologies often assume uniform distribution of traffic, where all tiles produce and consume the same a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0b2373cff7e4d9628c71d1994b9b2a25
https://doi.org/10.1109/sbcci.2013.6644857
https://doi.org/10.1109/sbcci.2013.6644857