Zobrazeno 1 - 10
of 41
pro vyhledávání: '"James Laudon"'
Autor:
Jeffrey Dean, Richard Ho, William Hang, Roger Carpenter, Omkar Pathak, James Laudon, Kavya Srinivasa, Andy Tong, Ebrahim M. Songhori, Quoc V. Le, Joe Wenjie Jiang, Azade Nazi, Anna Goldie, Shen Wang, Azalia Mirhoseini, Young-Joon Lee, Eric Johnson, Jiwoo Pak, Emre Tuncer, Mustafa Yazgan
Publikováno v:
Nature. 594:207-212
Chip floorplanning is the engineering task of designing the physical layout of a computer chip. Despite five decades of research1, chip floorplanning has defied automation, requiring months of intense effort by physical design engineers to produce ma
Autor:
Norman P. Jouppi, Thomas Norrie, George Kurian, Sheng Li, David A. Patterson, Doe Hyun Yoon, Nishant Patil, James Laudon, Cliff Young
Publikováno v:
IEEE Micro. 41:56-63
Five years ago, few would have predicted that a software company like Google would build its own computers. Nevertheless, Google has been deploying computers for machine learning (ML) training since 2017, powering key Google services. These Tensor Pr
Autor:
Azalia Mirhoseini, Peter Ma, Daniel Lin-Kit Wong, Yanqi Zhou, James Laudon, Qiumin Xu, AmirAli Abdolrashidi, Sudip Roy
Publikováno v:
IEEE Micro. 40:26-36
With increasingly complex neural network architectures and heterogeneous device characteristics, finding a reasonable graph partitioning and device placement strategy is challenging. There have been prior attempts at learned approaches for solving de
Autor:
David A. Patterson, Nishant Patil, Doe Hyun Yoon, Norman P. Jouppi, James Laudon, Cliff Young, Sheng Li, George Kurian
Publikováno v:
Communications of the ACM. 63:67-78
Google's TPU supercomputers train deep neural networks 50x faster than general-purpose supercomputers running a high-performance computing benchmark.
Autor:
Sheng Li, George Kurian, Zongwei Zhou, Xiaoyu Ma, Thomas B. Jablin, David A. Patterson, Mark Gottscho, Norman P. Jouppi, Doe Hyun Yoon, Peter Ma, Cliff Young, Thomas Norrie, Sushma Prasad, Matthew Ashcraft, Nishant Patil, James Laudon
Publikováno v:
ISCA
Google deployed several TPU generations since 2015, teaching us lessons that changed our views: semi-conductor technology advances unequally; compiler compatibility trumps binary compatibility, especially for VLIW domain-specific architectures (DSA);
Autor:
Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe Wenjie Jiang, Ebrahim Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean
Publikováno v:
Nature. 604:E24-E24
Autor:
Azalia, Mirhoseini, Anna, Goldie, Mustafa, Yazgan, Joe Wenjie, Jiang, Ebrahim, Songhori, Shen, Wang, Young-Joon, Lee, Eric, Johnson, Omkar, Pathak, Azade, Nazi, Jiwoo, Pak, Andy, Tong, Kavya, Srinivasa, William, Hang, Emre, Tuncer, Quoc V, Le, James, Laudon, Richard, Ho, Roger, Carpenter, Jeff, Dean
Publikováno v:
Nature. 594(7862)
Chip floorplanning is the engineering task of designing the physical layout of a computer chip. Despite five decades of research
Autor:
James Laudon, Norman P. Jouppi, George Kurian, Nishant Patil, Cliff Young, Sheng Li, Thomas Norrie, Doe Hyun Yoon, David A. Patterson
Publikováno v:
Hot Chips Symposium
Chip multiprocessors - also called multi-core microprocessors or CMPs for short - are now the only way to build high-performance microprocessors, for a variety of reasons. Large uniprocessors are no longer scaling in performance, because it is only p
Autor:
Alek Jaworski, Suresh Bhatia, Kieran Miller, Rahul Nagarajan, Amir Salek, Gordon MacKean, Jeffrey Dean, Dan Steinberg, Sarah Bates, Matt Ross, Rick Boyle, Walter Wang, Mark Omernick, Albert T. Borchers, Narayana Penukonda, Ray Ni, Bo Tian, Diemthu Le, David A. Patterson, Aaron Jaffey, Ben Gelb, Andy Swing, Khaitan Harshit, Andrew Everett Phelps, Christopher Aaron Clark, Robert Hundt, Gregory Michael Thorson, Gregory Sizikov, Zhuyuan Liu, Michael J. Daley, Kathy Nix, Andy Koch, Horia Toma, Alexander Kaplan, C. Richard Ho, Steve Lacy, Maire Mahony, Nan Boden, Chris Severn, Rajendra Gottipati, Emad Samadiani, Adriana Maggiore, Norman P. Jouppi, Richard Walter, Mercedes Tan, Doe Hyun Yoon, Vijay K. Vasudevan, Jonathan Ross, Erick Tuttle, Doug Hogberg, Raminder Bajwa, Jed Souter, James Law, Robert Hagmann, William John Gulland, Ravi Narayanaswami, Jeremy Coriell, Naveen Kumar, Chris Leary, Tara Vazir Ghaemmaghami, Pierre-luc Cantin, Matt Dau, D. Hurt, Matthew Snelham, Julian Ibarz, Daniel Killebrew, John Hu, James Laudon, Cliff Young, Thomas Norrie, Kyle Lucke, Gaurav Agrawal, Clifford Chao, Nishant Patil, Alan Lundin, Eric Wilcox
Publikováno v:
ISCA
Many architects believe that major improvements in cost-energy-performance must now come from domain-specific hardware. This paper evaluates a custom ASIC---called a Tensor Processing Unit (TPU) --- deployed in datacenters since 2015 that accelerates