Zobrazeno 1 - 10
of 13
pro vyhledávání: '"James F. Buller"'
Autor:
D. Greenlaw, Jon D. Cheek, Manfred Horstmann, Christoph Schwan, Markus Lenski, Peter Huebler, Scott Luning, R. van Bentum, N. Kepler, Matthias Schaller, James F. Buller, Hartmut Ruelke, Kai Frohberg, Gert Burbach, Rolf Stephan, J. Klais, S. Krishnan, Jörg Hohage, Andy Wei, Th. Feudel, Michael Raab, G. Grasshoff, Karsten Wieczorek, Martin Gerhardt
Publikováno v:
Materials Science and Engineering: B. :3-8
Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::abb84ee304cfa2679774d71a12b2b9b9
https://doi.org/10.1016/j.mseb.2004.07.077
https://doi.org/10.1016/j.mseb.2004.07.077
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 10:147-153
In this study, the technical feasibility and limitation of the TiN film formed by the rapid thermal heat treatment (RTHT) in an ammonia ambient for the fabrication of 0.85-/spl mu/m CMOS flash electrically programmable read only memory (EPROM) integr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7cad3df13b0e6dbcd67f8c1bd51d9a63
https://doi.org/10.1109/66.554502
https://doi.org/10.1109/66.554502
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 9:471-476
The effects of integration of a low-temperature RCA standard clean-1 (SC1) on the tunnel- and gate-oxide charge-to-breakdown (Q/sub BD/) and voltage ramped dielectric breakdown (VRDB) distribution in a 0.7 /spl mu/m CMOS EEPROM process technology wer
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fb9f2f2052f22bd23d39c75c9ce831c6
https://doi.org/10.1109/66.536119
https://doi.org/10.1109/66.536119
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 9:108-114
The effect of rapid thermal processing on wafer distortion and overlay accuracy in global alignment photolithography in the fabrication of 0.85 /spl mu/m CMOS Flash EPROM integrated circuits was studied. Both rapid thermal process parameters and syst
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d0b811f07d2891e30f518e9bc2fd6634
https://doi.org/10.1109/66.484290
https://doi.org/10.1109/66.484290
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 7:79-86
The conventional (plug-less) and tungsten (W) plug contact interconnect technologies were studied for the fabrication of 0.85 /spl mu/m CMOS EPROM integrated circuit devices. 4 Mbit EPROM devices and appropriate test structures were fabricated using
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::678514c731ee842422c84f6980b21ed3
https://doi.org/10.1109/66.286835
https://doi.org/10.1109/66.286835
Publikováno v:
CICC
32-nm complementary metal oxide semiconductor (CMOS) silicon-on-insulator (SOI) with metal gate high-k (MGHK) offers high performance and low power for microprocessors. However, these advanced technologies come with challenges for analog design. Many
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::352dfc173d49e4438fdfebb4b16495a7
https://doi.org/10.1109/cicc.2011.6055396
https://doi.org/10.1109/cicc.2011.6055396
Autor:
Thorsten Knopp, James F. Buller, Hans vanMeer, Kalyana Kumar, Yuri Apanovich, John Faricelli, James C. Pattison, Bill Gardiol, Greg Constant, Joe Meier, Sean Hannon, Sushant Suryagandh, Kevin Carrejo, Darin Chan, Uwe Hahn, Akif Sultan, A.B. Icel, Rasit O. Topaloglu, Steve F. Hejl, David Wu, Kaveri Mathur, Victor F. Andrade, Larry A. Bair
Publikováno v:
ISQED
Stressors have been used since 90 nm technology to improve device performance to overcome the limitations of scaling. The stressors, including, - CPEN, TPEN, SMT, and e-SiGe to improve NMOS and PMOS drive current exhibit proximity dependence. In addi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::271703b2faeb4e35b5986a54968f212e
https://doi.org/10.1109/isqed.2009.4810335
https://doi.org/10.1109/isqed.2009.4810335
Publikováno v:
CICC
Gate length (L/sub GATE/) scaling to reduce CMOS delay is becoming problematic due to high gate currents from thin gate dielectrics, process induced L/sub GATE/ variation, and high channel dopings that reduce carrier mobility. These issues have led t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::70861541f4e505721ac6ace583d9e9bb
https://doi.org/10.1109/cicc.2004.1358784
https://doi.org/10.1109/cicc.2004.1358784
Autor:
D. Greenlaw, Rolf Stephan, James F. Buller, Jon D. Cheek, Michael Raab, Christoph Schwan, Markus Lenski, N. Kepler, Karsten Wieczorek, Martin Gerhardt, Gert Burbach, Thomas Feudel, Jörg Hohage, Kai Frohberg, Andy Wei, J. Klais, S. Krishnan, Scott Luning, Peter Huebler, Matthias Schaller, Manfred Horstmann, G. Grasshoff, R. van Bentum, Hartmut Ruelke
Publikováno v:
2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).
Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40nm gate length (L/sub GATE/) PD SO
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f62e0264ca8939d4f6f59bcec34bf33
https://doi.org/10.1109/icicdt.2004.1309909
https://doi.org/10.1109/icicdt.2004.1309909
Publikováno v:
SPIE Proceedings.
The benefits of super steep retrograde channel profiles on MOS transistor performance as reported in the literature have been inconsistent. This inconsistency is in part due to the sensitivity of the performance benefit to the process parameters and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1701de4f58244354da2a35f50ed306a5
https://doi.org/10.1117/12.360544
https://doi.org/10.1117/12.360544