Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Jakub Kopanski"'
Publikováno v:
MIXDES
This paper presents a low-pass filter with variable gain for use in direct conversion wireless receivers. The filter is implemented using the switched-capacitor technique. Its sampling clock frequency is, however, only moderately higher than signal f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2cee7ca77dfa7408329c3e8a42c93573
https://doi.org/10.1109/mixdes.2016.7529716
https://doi.org/10.1109/mixdes.2016.7529716
Autor:
Krzysztof Marcinek, Tomasz Borejko, Jakub Kopanski, Piotr Boguszewicz, Andrzej Wielgus, Witold A. Pleskacz, Maciej Plasota, Pawel Narczyk, Adam Jarosz, Krzysztof Siwiec, Aleh Halauko, Ewa Kurjata-Pfitzner
Publikováno v:
DDECS
The BioSoC is a highly integrated SoC that consists of analog front-ends, analog to digital converters and a 32-bit microcontroller — Adelite. The designed IC allows for dynamic acquisition and processing of the most important human physiological p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3745a016ce577319d6ad6beaf95c21cb
https://doi.org/10.1109/ddecs.2016.7482464
https://doi.org/10.1109/ddecs.2016.7482464
Publikováno v:
DDECS
The paper presents an Integer-N phase locked loop (PLL) for Bluetooth receiver implemented in CMOS 130 nm technology. The presented phase locked loop consists of an LC quadrature voltage controlled oscillator with capacitor bank, a tri-state phase-fr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9aef8fe717b67ad0cdcb4aa63cee9f1a
https://doi.org/10.1109/ddecs.2016.7482469
https://doi.org/10.1109/ddecs.2016.7482469
Autor:
Tomasz Borejko, Witold A. Pleskacz, Jakub Kopanski, Pawel Narczyk, Krzysztof Marcinek, Maciej Plasota, Adam Jarosz, Andrzej Wielgus, Ewa Kurjata-Pfitzner, Krzysztof Siwiec
Publikováno v:
MIXDES
A system-on-chip allowing dynamic measurement and processing of the most important human physiological parameters has been presented. The BioChip consists of analog front-ends, analog to digital converters and a two core 32-bit microcontroller Azurit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c80db3ce4522369b9c03ce43d51741fa
https://doi.org/10.1109/mixdes.2015.7208477
https://doi.org/10.1109/mixdes.2015.7208477
Publikováno v:
MIXDES
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d7d21a15c98780198eeb4a414cd48835
https://doi.org/10.1109/mixdes.2014.6872191
https://doi.org/10.1109/mixdes.2014.6872191
Publikováno v:
MIXDES
A model of GFSK (Gaussian Frequency Shift Keying) signal demodulator that makes use of time to digital conversion is presented. It has been implemented in the Simulink environment. The performance of the demodulator is investigated for various values
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a471198521d7748299230e784d905c4e
https://doi.org/10.1109/mixdes.2014.6872213
https://doi.org/10.1109/mixdes.2014.6872213
Publikováno v:
DDECS
In this paper a 5Gb/s equalizer has been presented. It is designed to operate within USB 3.0 transceiver and compensates for frequency dependent losses introduced by transmission channel. For the reference signal, the clock and data recovery circuit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1de8446e0a8d8642512577316b08213a
https://doi.org/10.1109/ddecs.2011.5783063
https://doi.org/10.1109/ddecs.2011.5783063