Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Jai-Hoon Chung"'
Publikováno v:
International Journal of High Speed Computing. :89-107
The adaptive routing approach has been expected as a promising way to improve network performance by utilizing available network bandwidth. Previous adaptive routing strategies in wormhole-routed multicomputer networks restrict the routing of message
Publikováno v:
Microprocessing and Microprogramming. 40:465-486
In multicomputer networks, the adaptive routing has been expected as a promising way to improve network performance by utilizing available network bandwidth. Previous adaptive routing algorithms in wormhole-routed multicomputer networks restrict the
Publikováno v:
ICPP (1)
The systolic array implementation of artificial neural networks is one of the best solutions to the communication problems generated by the highly interconnected neurons. In this paper, a two-dimensional systolic array for backpropagation neural netw
Publikováno v:
Proceedings High Performance Computing on the Information Superhighway. HPC Asia '97.
Many 'output scheduling' algorithms have been proposed for improving the performance of input-queued asynchronous transfer mode (ATM) switches, whereby cells from different random-access input queues destined for the same output can be scheduled for
Publikováno v:
ICC (1)
This paper proposes a new scheme for an ATM OAM performance management function, hybrid performance management scheme. The performance management OAM function monitors network performance using OAM cells and executes mechanisms to prevent traffic con
Publikováno v:
Cryptographic Hardware and Embedded Systems ISBN: 9783540666462
CHES
CHES
CRYPTON is a 128-bit block encryption algorithm proposed as a candidate for the Advanced Encryption Standard (AES), and is expected to be especially efficient in hardware implementation. In this paper, hardware designs of CRYPTON, and their performan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::805c54ebcd2defba00da16b06f3042ac
https://doi.org/10.1007/3-540-48059-5_6
https://doi.org/10.1007/3-540-48059-5_6
Publikováno v:
[Proceedings] 1991 IEEE International Joint Conference on Neural Networks.
A two-dimensional systolic array for a backpropagation neural network is presented. The design is based on the classical systolic algorithm of matrix-by-vector multiplication and exploits the inherent parallelisms of backpropagation neural networks.
Publikováno v:
Proceedings High Performance Computing on the Information Superhighway HPC Asia '97; 1997, p260-265, 6p
Conference
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Publikováno v:
Proceedings of ICC'97 - International Conference on Communications; 1997, Issue 1, p251-251, 1p