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The objective of this project is to design an efficient architecture for MPEG-4 binary shape decoder. The efficiency if the architecture is investigated in terms of speed and area. Power minimization is also taken into consideration. Master of Engine
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______1392::df38b57c3e3823012c70a1ce4257a736
http://hdl.handle.net/10356/4467
http://hdl.handle.net/10356/4467
