Zobrazeno 1 - 10
of 20
pro vyhledávání: '"Jaejune Jang"'
Autor:
Jong-Kook Kim, Tae-Joo Hwang, Jaejune Jang, Dae-Woo Kim, Seungwook Yoon, Eun-Seok Song, Kilsoo Kim, Seung-Yong Cha, Dan Kyung Suk Oh, Gyoungbum Kim, Sung-Hwan Min
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
An integrated stack capacitor (ISC) solution, which can effectively suppress power noise in high frequency bands, is introduced. The basic structure of the ISC is a vertical cylinder array consisting of many capacitive vias. The proposed ISC shows hi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8a017ae0d278b1f36f4797dc456eb085
https://doi.org/10.1109/ectc32862.2020.00215
https://doi.org/10.1109/ectc32862.2020.00215
Autor:
Sunghee Cho, Min-Su Kim, Jaejune Jang, Kyongsik Yeom, Duck-Hyung Lee, Yong-Seok Chung, Ji-Sung Kim, Kyung-Soo Min, Chang-Min Jeon, Dong-Hyun Kim, Hong-Kook Min, MyeongHee Oh, Jongsung Woo, Hyunug Kang, Bo-Young Seo, Hyo-sang Lee, Yong-Kyu Lee, K. Kim
Publikováno v:
2017 Symposium on VLSI Technology.
We developed a 4Mb split-gate e-flash on 28-nm low-power HKMG logic process, which demonstrates the smallest bit-cell size (0.03×-um2) for high performance IoT applications. High speed operation (25us write time and 2ms erase operation) and robust r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9311b8029e9be398f397fce08defa6a2
https://doi.org/10.23919/vlsit.2017.7998171
https://doi.org/10.23919/vlsit.2017.7998171
Characterization of RF power BJT and improvement of thermal stability with nonlinear base ballasting
Publikováno v:
IEEE Journal of Solid-State Circuits. 33:1428-1432
A novel base ballasting scheme for interdigitated power RF bipolar transistors has demonstrated improved performance and thermal stability. The nonlinear ballast resistor in series with each base finger is implemented using a depletion-mode FET, whic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a416405ffb2a93921f5acfd4daa2fcce
https://doi.org/10.1109/4.711343
https://doi.org/10.1109/4.711343
Autor:
null Jaejune Jang, null Kyu-Heon Cho, null Dongeun Jang, null Minhwan Kim, null Changjoon Yoon, null Junsung Park, null Hyunsil Oh, null Chiho Kim, null Hyoungsoo Ko, null Keunho Lee, null Sangbae Yi
Publikováno v:
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7c591639ce92b60935730b016f3b034b
https://doi.org/10.1109/ispsd.2013.6694462
https://doi.org/10.1109/ispsd.2013.6694462
Publikováno v:
Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's.
We present the integration, device fabrication as well as a reliability analysis of 36 V drain extended CMOS transistors into a 0.35 CMOS baseline technology by utilizing the existing implants and adding 2 additional masking layers. Breakdown voltage
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b06439a342b790c27615fbaf063b6b8e
https://doi.org/10.1109/ispsd.2007.4294967
https://doi.org/10.1109/ispsd.2007.4294967
Autor:
Jaejune Jang, Robert W. Dutton
Publikováno v:
Simulation of Semiconductor Processes and Devices 2004 ISBN: 9783709172124
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::529a32ef32dd534cbba2fe826af6f6c8
https://doi.org/10.1007/978-3-7091-0624-2_88
https://doi.org/10.1007/978-3-7091-0624-2_88
Publikováno v:
IEEE MTT-S International Microwave Symposium Digest, 2003.
An accurate method to extract a small signal equivalent circuit model of RF silicon MOSFETs is presented. Analytical calculations are used for each intrinsic parameter and accuracy is within 1% for the entire operational region. 2D physical device si
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::94034e9838829ee5f23b5d2ec2f75f56
https://doi.org/10.1109/mwsym.2003.1210578
https://doi.org/10.1109/mwsym.2003.1210578
Publikováno v:
Proceedings of Custom Integrated Circuits Conference.
Accurate estimation of the parasitics in high-speed circuits is critical in optimizing circuit performance. A new method for parasitic characterization of highspeed circuits employing mixed-mode circuit and device simulation is proposed. The intrinsi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7295abffc856cf03d8b1137180ddabd9
https://doi.org/10.1109/cicc.1996.510593
https://doi.org/10.1109/cicc.1996.510593
Publikováno v:
Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting.
A novel base ballasting scheme for interdigitated power RF bipolar transistors has demonstrated improved performance and thermal stability. The nonlinear ballast resistor in series with each base finger is implemented by depletion-mode FET, which req
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a63df8ff1784ff2ec93f4887c5f533e1
https://doi.org/10.1109/bipol.1997.647421
https://doi.org/10.1109/bipol.1997.647421
Autor:
Robert W. Dutton, O. Tornblad, Jaejune Jang, Zhiping Yu, Qiang Chen, T. Arnborg, Kaustav Banerjee
Publikováno v:
2001 IEEE MTT-S International Microwave Sympsoium Digest (Cat. No.01CH37157).
This paper presents characterization of power LDMOS using device simulation and analytical modeling. Features of the LDMOS such as graded channel and quasi-saturation effect which result in a peculiar behavior on capacitance and nonlinear LDD resista
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::af14563e74a1ace76cb1ceccad2620ee
https://doi.org/10.1109/mwsym.2001.967053
https://doi.org/10.1109/mwsym.2001.967053