Zobrazeno 1 - 10
of 38
pro vyhledávání: '"Jae-Seok Yang"'
Autor:
Hyung Ah Jo, Seung Seok Han, Sunhwa Lee, Joo Young Kim, Seung Hee Yang, Hajeong Lee, Jae Seok Yang, Jung Pyo Lee, Kwon Wook Joo, Chun Soo Lim, Yon Su Kim, Curie Ahn, Jin Suk Han, Dong Ki Kim
Publikováno v:
BMC Nephrology, Vol 20, Iss 1, Pp 1-7 (2019)
Abstract Background An increasing amount of evidence has demonstrated an association between an increase in the level of tumor necrosis factor superfamily 13 (TNFSF13) and immunoglobulin A nephropathy (IgAN) progression. We aimed to evaluate if the l
Externí odkaz:
https://doaj.org/article/717fa175663a43db8be0992137d1e4f6
Autor:
Keun Hyung Park, Chan-Young Jung, Wonjeong Jeong, Gongmyung Lee, Jae Seok Yang, Chung Mo Nam, Hyung Woo Kim, Beom Seok Kim
Publikováno v:
Open Forum Infectious Diseases. 9
This study aimed to investigate the impact of nationwide nonpharmaceutical interventions against coronavirus disease 2019 (COVID-19) on the incidence of Pneumocystis jirovecii pneumonia (PCP) in kidney transplant recipients. The monthly incidence of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::84d4d3282d1d570edf201d39fc38f1b4
https://doi.org/10.1093/ofid/ofac076
https://doi.org/10.1093/ofid/ofac076
Autor:
Keun Hyung, Park, Chan-Young, Jung, Wonjeong, Jeong, Gongmyung, Lee, Jae Seok, Yang, Chung Mo, Nam, Hyung Woo, Kim, Beom Seok, Kim
Publikováno v:
Open forum infectious diseases. 9(6)
This study aimed to investigate the impact of nationwide nonpharmaceutical interventions against coronavirus disease 2019 (COVID-19) on the incidence of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=pmid________::04c70ed4dcb3aa56adaf6c02403bf468
https://pubmed.ncbi.nlm.nih.gov/35770128
https://pubmed.ncbi.nlm.nih.gov/35770128
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 32:905-917
In this paper, we study the impact of through-silicon-via (TSV) and shallow trench isolation (STI) stress on the timing variations of 3-D IC. We also propose the first systematic TSV-STI-stress-aware timing analysis and show how to optimize layouts f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3906a922aa1001a05c7bdd9fe7bedc92
https://doi.org/10.1109/tcad.2013.2237770
https://doi.org/10.1109/tcad.2013.2237770
Publikováno v:
ISPD
Double patterning lithography (DPL) is considered as a most likely solution for 32 nm/22 nm technology. In DPL, the layout patterns are decomposed into two masks (colors), and manufactured through two exposures and etch steps. If the spacing between
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1fa28ee493787538c07f0513d2c10197
https://doi.org/10.1109/tcad.2009.2035577
https://doi.org/10.1109/tcad.2009.2035577
Publikováno v:
SPIE Proceedings.
Because extreme ultra violet (EUV) lithography is not ready due to technical challenges and low throughput, we are facing severe limitation for sub-20nm node patterning even though the extreme resolution enhancement technology (RET) such as the off-a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f84bf3a98be964eda808af987940da23
https://doi.org/10.1117/12.964976
https://doi.org/10.1117/12.964976
Autor:
Duo Ding, Minsik Cho, David Z. Pan, Jhih-Rong Gao, Kun Yuan, Jae-Seok Yang, Bei Yu, Yongchan Ban
Publikováno v:
Proceedings of the International Conference on Computer-Aided Design.
As the CMOS feature enters the era of extreme scaling (14nm, 11nm and beyond), manufacturability challenges are exacerbated. The nanopatterning through the 193nm lithography is being pushed to its limit, through double/triple or more general multiple
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f704c8c848defd29f6069aa3abd1ce0
https://doi.org/10.1145/2429384.2429430
https://doi.org/10.1145/2429384.2429430
Autor:
Sung Kyu Lim, Jae-Seok Yang, David Z. Pan, Moongon Jung, Jiwoo Pak, Mohit Pathak, Joydeep Mitra, Krit Athikulwongse
Publikováno v:
ASP-DAC
The 3D IC integration using through-silicon-vias (TSV) has gained tremendous momentum recently for industry adoption. However, as TSV involves disruptive manufacturing technologies, new modeling and design techniques need to be developed for 3D IC ma
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f5a0e4f20e022fd19d0b258951450026
https://doi.org/10.1109/aspdac.2012.6165055
https://doi.org/10.1109/aspdac.2012.6165055
Publikováno v:
2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ebe83e21c8a97e6f2efcfd0b16a2e7df
https://doi.org/10.1109/iccad.2011.6105327
https://doi.org/10.1109/iccad.2011.6105327
Autor:
Yongchan Ban, Jae-Seok Yang
Publikováno v:
DAC
Line-edge roughness (LER) highly affects the device saturation current and leakage current, which leads to serious device performance degradation. In this paper, we propose the first layout-aware LER model where LER is highly related to the lithograp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4f6bfb47388a1afd9360fdf62096e267
https://doi.org/10.1145/2024724.2024828
https://doi.org/10.1145/2024724.2024828