Zobrazeno 1 - 10
of 48
pro vyhledávání: '"Jadav, Sunil"'
Steep subthreshold swing Double - Gate tunnel FET using source pocket engineering: Design guidelines
Publikováno v:
In Micro and Nanostructures November 2024 195
Publikováno v:
Sensor Review, 2023, Vol. 43, Issue 2, pp. 108-124.
Externí odkaz:
http://www.emeraldinsight.com/doi/10.1108/SR-09-2022-0339
Autor:
Jadav, Sunil
Publikováno v:
International Journal of Electronics Letters; October 2024, Vol. 12 Issue: 4 p472-482, 11p
Publikováno v:
In Microelectronics Journal January 2021 107
Speed is a major concern for high density VLSI networks. In this paper the closed form delay model for current mode signalling in VLSI interconnects has been proposed with resistive load termination. RLC interconnect line is modelled using characteri
Externí odkaz:
http://arxiv.org/abs/1412.7818
Publikováno v:
In Cryogenics June 2020 108
Publikováno v:
International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.3, June 2012, 95-105
Power consumption has become a critical concern in both high performance and portable applications. Methods for power reduction based on the application of adiabatic techniques to CMOS circuits have recently come under renewed investigation. In therm
Externí odkaz:
http://arxiv.org/abs/1207.3302
Publikováno v:
Multimedia Tools & Applications; Apr2024, Vol. 83 Issue 12, p34995-35024, 30p
Akademický článek
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Autor:
Choudhary, Kuldeep1 (AUTHOR), Jadav, Sunil1 (AUTHOR) suniljadav1@gmail.com, Tayal, Shubham2 (AUTHOR), Kaur, Preet1 (AUTHOR), Rai, Lalit1 (AUTHOR), Sharma, Rajneesh3 (AUTHOR)
Publikováno v:
International Journal of Electronics. 2023, Vol. 110 Issue 11, p2085-2099. 15p.