Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Jacob Leverich"'
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 9:1-28
VLSI process technology scaling has enabled dramatic improvements in the capacity and peak bandwidth of DRAM devices. However, current standard DDR x DIMM memory interfaces are not well tailored to achieve high energy efficiency and performance in mo
Autor:
Stephen M. Rumble, David Mazières, Christos Kozyrakis, Subhasish Mitra, Ryan Stutsman, John Ousterhout, Guru Parulkar, Diego Ongaro, David Erickson, Aravind Narayanan, Eric Stratmann, Jacob Leverich, Parag Agrawal, Mendel Rosenblum
Publikováno v:
Communications of the ACM. 54:121-130
With scalable high-performance storage entirely in DRAM, RAMCloud will enable a new breed of data-intensive applications.
Autor:
Christos Kozyrakis, Jacob Leverich
Publikováno v:
ACM SIGOPS Operating Systems Review. 44:61-65
Distributed processing frameworks, such as Yahoo!'s Hadoop and Google's MapReduce, have been successful at harnessing expansive datacenter resources for large-scale data analysis. However, their effect on datacenter energy efficiency has not been scr
Autor:
John Ousterhout, Mendel Rosenblum, Subhasish Mitra, Ryan Stutsman, David Erickson, Guru Parulkar, Aravind Narayanan, Stephen M. Rumble, Jacob Leverich, Parag Agrawal, Eric Stratmann, Christos Kozyrakis, David Mazières
Publikováno v:
ACM SIGOPS Operating Systems Review. 43:92-105
Disk-oriented approaches to online storage are becoming increasingly problematic: they do not scale gracefully to meet the needs of large-scale Web applications, and improvements in disk capacity have far outstripped improvements in access latency an
Publikováno v:
IEEE Computer Architecture Letters. 8:48-51
While modern processors offer a wide spectrum of software-controlled power modes, most datacenters only rely on dynamic voltage and frequency scaling (DVFS, a.k.a. P-states) to achieve energy efficiency. This paper argues that, in the case of datacen
Publikováno v:
IEEE Computer Architecture Letters. 8:5-8
Demand for memory capacity and bandwidth keeps increasing rapidly in modern computer systems, and memory power consumption is becoming a considerable portion of the system power budget. However, the current DDR DIMM standard is not well suited to eff
Autor:
Amin Firoozshahian, Alex Solomatnikov, Hideho Arakida, Christos Kozyrakis, Mark Horowitz, Jacob Leverich
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 5:1-30
There are two competing models for the on-chip memory in Chip Multiprocessor (CMP) systems: hardware-managed coherent caches and software-managed streaming memory . This paper performs a direct comparison of the two models under the same set of assum
Autor:
Christos Kozyrakis, Jacob Leverich
Publikováno v:
EuroSys
The simplest strategy to guarantee good quality of service (QoS) for a latency-sensitive workload with sub-millisecond latency in a shared cluster environment is to never run other workloads concurrently with it on the same server. Unfortunately, thi
Publikováno v:
CNSM
Manageability is a key design constraint for IT solutions, defined as the range of operations required to maintain and administer system resources through their lifecycle phases. Emerging complex and powerful management platforms and automation softw
Publikováno v:
SC
Continuous evolution in process technology brings energy-efficiency and reliability challenges, which are harder for memory system designs since chip multiprocessors demand high bandwidth and capacity, global wires improve slowly, and more cells are