Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Jacob Couch"'
Publikováno v:
2023 Systems and Information Engineering Design Symposium (SIEDS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::759cfbcc5f35118e9cbfab246b91c4c1
https://doi.org/10.1109/sieds58326.2023.10137784
https://doi.org/10.1109/sieds58326.2023.10137784
Publikováno v:
HOST
In many reverse engineering efforts, side channels have been utilized to extract both design information and data from integrated circuits. In this paper, a technique is demonstrated to recover data by directly reading idle SRAM cells within an FPGA,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::96726dcd9a7b7298177872fcc89f1c30
https://doi.org/10.1109/hst.2018.8383889
https://doi.org/10.1109/hst.2018.8383889
Autor:
John Arkoian, Jacob Couch
Publikováno v:
FPL
FPGAs are used in many long-life systems that serve mission-critical needs. The supply chain and life-cycle management of these devices have long relied on ensuring adequate controls are in place. In this paper, a technique is presented that provides
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::56bd39231530791edc21550f7a0becbb
https://doi.org/10.1109/fpl.2016.7577335
https://doi.org/10.1109/fpl.2016.7577335
Publikováno v:
HOST
Design recovery is commonly conducted across many different platforms to gain knowledge about the underlying internals of a system. In this paper, a concept of segmentation and fuzzy matching is introduced to identify IP blocks within a design. Throu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ceb4bb4d8014b6f1725eb38b34e32bc
https://doi.org/10.1109/hst.2016.7495560
https://doi.org/10.1109/hst.2016.7495560
Autor:
Jacob Couch, Peter Athanas
Publikováno v:
ReConFig
FPGA interconnects are typically utilized as digital resources to connect the logical building blocks of an FPGA. Because of the flexibility in the FPGA interconnect, all of the wires in the interconnect will never be simultaneously utilized. These u
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d290ae09737b0e1aff3add98d60e6287
https://doi.org/10.1109/reconfig.2011.9
https://doi.org/10.1109/reconfig.2011.9
Publikováno v:
FPGA
The programmable interconnection resources are one aspect that distinguishes FPGAs from other devices. The abundance of these resources in modern devices almost always assures us that the most complex design can be routed. This underutilized resource
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6410daf88fda73c0b1267b8a5517a0d8
https://doi.org/10.1145/1950413.1950455
https://doi.org/10.1145/1950413.1950455
Publikováno v:
FPGA
We present and describe Torc - (Tools for Open Reconfigurable Computing) - an open-source infrastructure and tool set, provided entirely as C++ source code and available at http://torc.isi.edu. Torc is suitable for custom research applications, for C
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::393fa82a43c31ffd59f1d5417c3fd56a
https://doi.org/10.1145/1950413.1950425
https://doi.org/10.1145/1950413.1950425