Zobrazeno 1 - 10
of 51
pro vyhledávání: '"JIN-FA LIN"'
Publikováno v:
Sensors, Vol 22, Iss 15, p 5696 (2022)
A low-voltage and low-power true single-phase flip-flop that minimum the total transistor count by using the pass transistor logic circuit scheme is proposed in this paper. Optimization measures lead to a new flip-flop design with better various perf
Externí odkaz:
https://doaj.org/article/d51d75476a7e46b7a6383a71b7324b14
Autor:
Ming-Hwa Sheu, Chang-Ming Tsai, Ming-Yan Tsai, Shih-Chang Hsia, S. M. Salahuddin Morsalin, Jin-Fa Lin
Publikováno v:
Sensors, Vol 21, Iss 19, p 6591 (2021)
An innovative and stable PNN based 10-transistor (10T) static random-access memory (SRAM) architecture has been designed for low-power bit-cell operation and sub-threshold voltage applications. The proposed design belongs to the following features: (
Externí odkaz:
https://doaj.org/article/224b45f9a21f47cba7c6b8aacfa84dd9
Publikováno v:
Applied Sciences, Vol 11, Iss 1, p 129 (2020)
The conventional shift register consists of master and slave (MS) latches with each latch receiving the data from the previous stage. Therefore, the same data are stored in two latches separately. It leads to consuming more electrical power and occup
Externí odkaz:
https://doaj.org/article/5bbb5a655f264fb7bddd558973f9ea83
Autor:
JIN-FA LIN, 林進發
99
In recent years, we focus on the maintenance of roads and find a way to construct a system from survey and patching. How to control the found and promote beneficial for pavement maintenance management is a very important study. This study use
In recent years, we focus on the maintenance of roads and find a way to construct a system from survey and patching. How to control the found and promote beneficial for pavement maintenance management is a very important study. This study use
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/71386784823341256371
Autor:
Jin-Fa Lin, 林進發
96
Low complexity and low power are two of the most crucial IC design issues nowadays. In this dissertation, efficient low complexity and low power CMOS design techniques for basic digital processing units such as adders, flip-flops (FFs) and mu
Low complexity and low power are two of the most crucial IC design issues nowadays. In this dissertation, efficient low complexity and low power CMOS design techniques for basic digital processing units such as adders, flip-flops (FFs) and mu
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/7t4ahw
Publikováno v:
ICCE-TW
A low voltage and low power true-single-phase flip-flop (FF) design using 16-transistor only is proposed. It is adapted from conventional master-slave based design and reduces layout area by using hybrid logic scheme. Optimization measures have resul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c99c48c8f90989614659c7544c20358f
https://doi.org/10.1109/icce-tw52618.2021.9602974
https://doi.org/10.1109/icce-tw52618.2021.9602974
Publikováno v:
IEICE Transactions on Electronics. :833-838
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c147297467847190b8415f55db67701e
https://doi.org/10.1587/transele.2018ecp5059
https://doi.org/10.1587/transele.2018ecp5059
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 19:505-509
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b0aaf34030c17725978af073196c68a7
https://doi.org/10.5573/jsts.2019.19.5.505
https://doi.org/10.5573/jsts.2019.19.5.505
Publikováno v:
Applied Sciences
Volume 11
Issue 1
Applied Sciences, Vol 11, Iss 129, p 129 (2021)
Volume 11
Issue 1
Applied Sciences, Vol 11, Iss 129, p 129 (2021)
The conventional shift register consists of master and slave (MS) latches with each latch receiving the data from the previous stage. Therefore, the same data are stored in two latches separately. It leads to consuming more electrical power and occup
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9e5e3d84e656ed2dbc2d14ae0e596fe3
Publikováno v:
Electronics
Volume 9
Issue 5
Electronics, Vol 9, Iss 783, p 783 (2020)
Volume 9
Issue 5
Electronics, Vol 9, Iss 783, p 783 (2020)
In this paper, a compact and low-power true single-phase flip-flop (FF) design with fully static operations is presented. The design is developed by using various circuit-reduction schemes and features a hybrid logic style employing both pass transis
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::32650c5dd49f4e8eb06e787119ed786d