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Autor:
J.M. Khoury, K.R. Lakshmikumar
Publikováno v:
IEEE Communications Magazine. 39:160-165
The architecture and critical circuit design issues for high-speed serial data links operating in excess of 1 Gb/s are described. Trade-offs in power vs. performance are presented for SONET/SDH transceivers and backplane transceivers for Infiniband o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2ee071d827d2c84b70a015df1bd6d09c
https://doi.org/10.1109/35.933452
https://doi.org/10.1109/35.933452
Autor:
H. Tao, J.M. Khoury
Publikováno v:
IEEE Journal of Solid-State Circuits. 34:1741-1752
A bandpass /spl Sigma/-/spl Delta/ modulator is described in this paper that uses frequency translation inside the /spl Sigma/-/spl Delta/ modulator loop to take advantage of the attributes of both continuous-time and discrete-time circuits. A CMOS d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::13c54740cafd88f23c3bdc4fc8b42143
https://doi.org/10.1109/4.808899
https://doi.org/10.1109/4.808899
Publikováno v:
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 46:991-1001
The effect of clock jitter on the dynamic range of discrete-time (DT) and continuous-time (CT) sigma-delta modulators is addressed. It is shown that clock jitter in DT modulators mixes with the input signal, while for CT modulators, the jitter mixes
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dcb7f05bdabff193cb390390110fe6fd
https://doi.org/10.1109/82.782040
https://doi.org/10.1109/82.782040
Autor:
J.M. Khoury
Publikováno v:
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 45:283-294
The generalized design of Automatic Gain Control (AGC) circuits that have constant settling time is described. Each of the major components of the AGC circuit is modeled and the criteria to obtain a gain settling time independent of the absolute gain
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7ea76c70a925d57d6d6d577e52fd08a9
https://doi.org/10.1109/82.664234
https://doi.org/10.1109/82.664234
Autor:
G.E. Offord, T. Karanink, O. Agazzi, S. Madine, P. Setty, K. Nagaraj, N. Sayiner, J. Plany, H. Burger, V. Comino, K. Threadgill, J.M. Khoury, Pervez M. Aziz, N. Rao, M. Heimann, R. Peruzzi, J. Sonntag
Publikováno v:
IEEE Transactions on Magnetics. 31:1186-1195
A complete read channel device using PR-IV signalling and maximum likelihood detection is described. Descriptions, simulated performance and measured results of the digital adaptive feedback loops (AGC, FIR tap weights, DFE tap weights, frequency and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c64d8988d0dffef665f05f5f6a440f9a
https://doi.org/10.1109/20.364805
https://doi.org/10.1109/20.364805
Autor:
J.M. Khoury
Publikováno v:
IEEE Journal of Solid-State Circuits. 26:1988-1997
A fifth-order CMOS continuous-time Bessel filter with a tunable 6- to 15-MHz cutoff frequency is described. This fully balanced transconductance-capacitor (G/sub m/-C) leapfrog filter achieves a dynamic range of 55 dB while dissipating 96 mW in a 5-V
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aa133b94b518922f8853e03276e16d12
https://doi.org/10.1109/4.104193
https://doi.org/10.1109/4.104193
Publikováno v:
IEEE Journal of Solid-State Circuits. 34:1688-1690
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da8acd32b31f856c4c517c327c375c8c
https://doi.org/10.1109/jssc.1999.808893
https://doi.org/10.1109/jssc.1999.808893
Synthesis of arbitrary rational transfer functions in s using uniform distributed RC active circuits
Autor:
J.M. Khoury, Yannis Tsividis
Publikováno v:
IEEE Transactions on Circuits and Systems. 37:464-472
A synthesis technique is described whereby network functions that are rational in s are realized with uniform distributed RC elements and active elements. In contrast to previous distributed synthesis approaches, the technique works directly in the s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bfa9ed93c4962e37daccbc5214e93996
https://doi.org/10.1109/31.52749
https://doi.org/10.1109/31.52749
Publikováno v:
IEEE Journal of Solid-State Circuits. 25:1032-1035
Two MOS squarer circuits are presented. One implementation operates on sampled-data signals, while the second uses continuous-time operation. Both squarers achieve the square-law function with MOS transistors operating in the nonsaturation region bia
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3baca340dee5f0c217e12ffd2caeb001
https://doi.org/10.1109/4.58302
https://doi.org/10.1109/4.58302