Zobrazeno 1 - 10
of 41
pro vyhledávání: '"J.J. Welser"'
Publikováno v:
Applied Physics A: Materials Science & Processing. 71:403-414
Memories that utilize single-electron effects are an attempt at combining the discreteness observable in transport of electrons on to very small capacitances (∼10-18 F) and into three-dimensionally quantum-confined states, with the reproducibility,
Autor:
J.J. Welser, C.T. Black
Publikováno v:
IEEE Transactions on Electron Devices. 46:776-780
A consequence of the finite electronic screening length in metals is that electric fields penetrate short distances into the metal surface. Using a simple, semiclassical model of an idealized capacitor, we estimate the capacitance correction due to t
Publikováno v:
Proceedings of the IEEE. 87:537-570
Publikováno v:
Superlattices and Microstructures. 23:757-770
Transport of electrons in semiconductor nano-structures exhibits many features that are a consequence of quantum confinement and Coulomb blockade. A quantum dot coupled to a metal-oxide-semiconductor transistor's channel region is one example of such
Publikováno v:
IEEE Transactions on Electron Devices. 53:941-943
Autor:
Min Yang, S.C. Ramac, Qingyun Yang, D.M. Kuchta, J.T. Marsh, Dennis L. Rogers, A.D. Ticknor, Kern Rim, Diane C. Boyd, A. Upham, Paul A. Rabidoux, Jeremy D. Schaub, F. Rodier, J.J. Welser
Publikováno v:
IEEE Electron Device Letters. 23:395-397
We report a novel silicon lateral trench photodetector that decouples the carrier transit distance from the light absorption depth, enabling both high speed and high responsivity. The photodetector, fabricated with fully VLSI compatible processes, ex
Autor:
M. Jurich, Kailash Gopalakrishnan, R. S. King, L.D. Bozano, M.E. Rothwell, B. N. Kurdi, H. K. Wickramasinghe, M. Hernandez, R. S. Shenoy, Charles T. Rettner, J.J. Welser, W.P. Risk, Y. Zhang, P. M. Rice, M.I. Sanchez
Publikováno v:
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..
Over the past few years, a number of techniques, including self-assembly, nanoimprint lithography and spacer-based frequency doubling, have been explored to pattern line and space structures that are considerably denser than possible with conventiona
Publikováno v:
IEEE Electron Device Letters. 18:278-280
A flash-memory device has been fabricated and demonstrated at room temperature by coupling a self-aligned, sub-50-nm quantum dot to the channel of a transistor on a silicon-on-insulator (SOI) substrate. Large threshold voltage shifts of up to 0.75 V
Autor:
U. Gruening, C.J. Radens, J.A. Mandelman, A. Michaelis, M. Seitz, N. Arnold, D. Lea, D. Casarotto, A. Knorr, S. Halle, T.H. Ivers, L. Economikos, S. Kudelka, S. Rahn, H. Tews, H. Lee, R. Divakaruni, J.J. Welser, T. Furukawa, T.S. Kanarsky, J. Alsmeier, G.B. Bronner
Publikováno v:
International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).
Results are presented for a novel trench capacitor DRAM cell using a vertical access transistor along the storage trench sidewall which effectively decouples the gate length from the lithographic groundrule. A unique feature of this cell is the verti
Publikováno v:
1999 57th Annual Device Research Conference Digest (Cat. No.99TH8393).
Straddle gate transistors are structures where the source/drain doped extension regions of a transistor are separated from the transistor control region through a low threshold-voltage side-wall which turns on before the transistor, and provides high