Smart Front-Ends, from Vision to Design

Autor: Maja Vidojkovic, Arthur van Roermund, André van Bezooijen, Peter Baltus, Emanuele Lopelli, Reza Mahmoudi, J.A. Hegt, Georgi Radulov

Publikováno v: IEICE Transactions on Electronics, E92.C(6), 747-756. Maruzen Co., Ltd/Maruzen Kabushikikaisha
IEICE Transactions on Electronics, 6, E92-C, 747-756

An integral multi-disciplinary chain optimization based on a high-level cascaded Shannon-based channel modeling is proposed. It is argued that the analog part of the front-end (FE) will become a bottleneck in the overall chain. This requires a FE-cen

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::89fd15eb3bf514b681ea449204c67fb0
https://doi.org/10.1587/transele.e92.c.747

Analysis and Design of High-Performance Asynchronous Sigma-Delta Modulators With a Binary Quantizer

Autor: G. van der Weide, Sotir Filipov Ouzounov, A.H.M. van Roermund, Engel Roza, J.A. Hegt

Publikováno v: IEEE Journal of Solid-State Circuits, 41(3), 588-596. Institute of Electrical and Electronics Engineers

Asynchronous sigma-delta modulators (ASDMs) are closed-loop nonlinear systems that transform the information in the amplitude of their input signal into time information in the output signal, without suffering from quantization noise such as in synch

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2d9617383c3e4b09ff36f4522bd4d31d
https://doi.org/10.1109/jssc.2005.864147

Limit cycle counting based smart background calibration of continuous time sigma delta ADCs

Autor: K.J. Pol, Sotir Filipov Ouzounov, J.A. Hegt, A.H.M. van Roermund

Publikováno v: ISCAS
Proceedings of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS 2014), 1-5 June 2014, Melbourne, Australia, 722-725
STARTPAGE=722;ENDPAGE=725;TITLE=Proceedings of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS 2014), 1-5 June 2014, Melbourne, Australia

In this paper, a new background calibration technique for sigma delta modulators (SDMs) is presented. This method uses limit cycle analysis of SDMs as a theoretical base. Several non-idealities such as loop filter inaccuracy, excess loop delay and in

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0e156ef224df525bc930007f3dc00f39
https://doi.org/10.1109/iscas.2014.6865237

Brownian-bridge-based statistical analysis of DAC INL caused by current mismatch

Autor: Markus Heydenreich, J.A. Hegt, A.H.M. van Roermund, Georgi Radulov, R.W. van der Hofstad

Publikováno v: IEEE Transactions on Circuits and Systems II: Express Briefs, 54(2), 146-150. Institute of Electrical and Electronics Engineers

This brief analytically investigates the digital-analog converter (DAC) integrated nonlinearity (INL) with respect to the accuracy of the DAC unit elements. The main novelty of the presented approach is in the application of the Brownian Bridge (BB)

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::be8dfd395d48ca38a5b11a422df94273
https://research.tue.nl/nl/publications/b174149e-c8d2-49c5-b1e5-fe84f21c3daa

A start-up calibration method for generic current-steering D/A converters with optimal area solution

Autor: A.H.M. van Roermund, Georgi Radulov, Patrick J. Quinn, J.A. Hegt

Publikováno v: 2005 IEEE International Symposium on Circuits and Systems, 788-791
STARTPAGE=788;ENDPAGE=791;TITLE=2005 IEEE International Symposium on Circuits and Systems
ISCAS (1)

This paper presents a new start-up calibration method for current-steering D/A converters, based on a 1-bit ADC. The paper proposes a new current cell that allows calibration of non-identical current sources by way of a shared calibration apparatus.

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ce337fabb478cccb3d766df2bece6dfd
https://doi.org/10.1109/iscas.2005.1464706