Zobrazeno 1 - 10
of 66
pro vyhledávání: '"J. Vitiello"'
Publikováno v:
Paleobiology. 37:287-302
Colony-wide feeding currents are a common feature of many bryozoan colonies. These feeding currents are centered on excurrent macular chimneys that expel previously filtered water away from the colony surface. In some bryozoans these macular chimneys
Autor:
L.L. Chapelon, Olivier Joubert, P. Brun, J. Vitiello, D. Fossati, H. Chaabouni, Thierry Chevolleau, R. Delsol, M. Aimadeddine, Vincent Arnal, Alexis Farcy, Joaquim Torres
Publikováno v:
Microelectronic Engineering. 84:2595-2599
Plasma ashing and etching integration steps on porous ultra low-k (ULK) have been investigated and are found to damage the porous dielectric structural and electrical properties, leading to weak performance and reliability. In order to overcome these
Autor:
J. C. Royer, Laurent-Luc Chapelon, Daniel Barbier, F. Naudin, D. Neira, J. Vitiello, J. Clerico, Joaquim Torres, P. Mukundhan, Guray Tas
Publikováno v:
Microelectronic Engineering. 83:2346-2350
Young's modulus, which is a measure of elastic strength, provides a good predictor of an interlevel dielectric (ILD) film's ability to withstand chemical mechanical polishing (CMP) and packaging stresses. Picosecond ultrasonics offers a high-throughp
Publikováno v:
Microelectronic Engineering. 83:2136-2141
A challenge for semiconductor industry is to reach low permittivity required by ITRS (k
Autor:
J.C. Dupuy, G. Bryce, Nicolas Gaillard, S. Chhun, J. Vitiello, V. Girault, M. Hopstaken, J. Guillan, Joaquim Torres, L.G. Gosset, B. Van Schravendijk, J. Michelon, Pascal Bancken, S. Courtas, R. Gras, Marc Juhel, L. Pinzelli, C. Debauche
Publikováno v:
Microelectronic Engineering. 83:2094-2100
Self-aligned barriers are widely investigated either in replacement of dielectric liners to decrease the total interconnect k value or as a treatment prior standard dielectric barrier deposition to improve reliability performances. In this paper, a t
Autor:
Laurent-Luc Chapelon, Joaquin Torres, Daniel Barbier, J. Vitiello, Vincent Arnal, A. Fuchsmann
Publikováno v:
Microelectronic Engineering. 82:422-426
Introduced for next interconnect generations to replace dense low-k materials, porous dielectrics exhibit poor mechanical properties, which are difficult to evaluate with nanoindentation. Indeed, integrated ultra low-k material thickness which drasti
Publikováno v:
Microelectronic Engineering. 76:1-7
Device performance for 65 nm node CMOS technology and beyond will require the integration of porous ultra-low-k materials with dielectric constant below 2.5, in order to reduce coupling effects between interconnect lines. This paper discusses the pro
Publikováno v:
Applied Surface Science. 230:425-430
Hydrogen coverage of the specific surface of meso-porous silicon nanostructures is studied by means of attenuated total reflection infrared spectroscopy. A strong correlation of silicon hydride bonds and of total amount of the adsorbed hydrogen to th
3D integration is now a realistic, mainstream solution to tackle the issue of device scaling and achieve decreased RC delay times and reduced power consumption, by using through-silicon-vias (TSV). In this architecture, a via liner performs multiple
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::192776c9c148b26272a0024cf2920a50
https://publica.fraunhofer.de/handle/publica/232900
https://publica.fraunhofer.de/handle/publica/232900
Publikováno v:
Journal of Business Strategy. 14:52-57
Reengineering promises to overhaul your organization from bow to stern—even if you have to scrap the vessel to do it. Here's how you can keep your business afloat—and head off a mutiny—while radically revising the individual processes that make