Zobrazeno 1 - 10
of 40
pro vyhledávání: '"J. Sondeen"'
Autor:
R. Naseer, Scott D. Stansberry, Lloyd W. Massengill, M.A. Bajura, J. Sondeen, S. DasGupta, Y. Boulghassoul, Arthur F. Witulski, Jeffrey Draper, John Damoulakis
Publikováno v:
IEEE Transactions on Nuclear Science. 54:935-945
A mathematical bit error rate (BER) model for upsets in memories protected by error-correcting codes (ECCs) and scrubbing is derived. This model is compared with expected upset rates for sub-100-nm SRAM memories in space environments. Because sub-100
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::43bd05567772adb1b2beb050e9e838d9
https://doi.org/10.1109/tns.2007.892119
https://doi.org/10.1109/tns.2007.892119
Autor:
J. Sondeen, Gokhan Daglikoca, J. Tim Barrett, Jaffrey Draper, S. Mediratta, Ihn Kim, Chang Woo Kang
Publikováno v:
Journal of VLSI signal processing systems for signal, image and video technology. 40:73-84
The Data-Intensive Architecture (DIVA) system employs Processing-In-Memory (PIM) chips as smart-memory coprocessors. This architecture exploits inherent memory bandwidth both on chip and across the system to target several classes of bandwidth-limite
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5917f349f6e3b951177353415b4075b0
https://doi.org/10.1007/s11265-005-4939-1
https://doi.org/10.1007/s11265-005-4939-1
Publikováno v:
2009 52nd IEEE International Midwest Symposium on Circuits and Systems.
Common distributed shared memory systems using a directory-based protocol operate with unicast messages for write invalidations. The unicast messages serialize the write invalidation transactions, which leads to increased network traffic and latency.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::353b4ebd2e2e5a440cb30ee2abf23ac5
https://doi.org/10.1109/mwscas.2009.5235964
https://doi.org/10.1109/mwscas.2009.5235964
Publikováno v:
ACM Great Lakes Symposium on VLSI
Networks-on-Chip (NoCs) become a critical design factor as chip multiprocessors (CMPs) and systems on a chip (SoCs) scale up with technology. With fundamental benefits of high bandwidth and scalability in on-chip networks, a newly added multicast cap
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f1273b68a499191fac868bc543cfea70
https://doi.org/10.1145/1531542.1531571
https://doi.org/10.1145/1531542.1531571
Publikováno v:
ICECS
Hardware support for floating-point (FP) arithmetic is an essential feature of modern microprocessor design. Although division and square root are relatively infrequent operations in traditional general-purpose applications, they are indispensable an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eee597b90af47d68bdd53987939b47a7
https://doi.org/10.1109/icecs.2008.4674950
https://doi.org/10.1109/icecs.2008.4674950
Publikováno v:
2007 50th Midwest Symposium on Circuits and Systems.
Hardware support for floating-point (FP) arithmetic is a mandatory feature of modern microprocessor design. Although division and square root are relatively infrequent operations in traditional general-purpose applications, they are indispensable and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fdfe36e635b32a7650bc1a629906375
https://doi.org/10.1109/mwscas.2007.4488594
https://doi.org/10.1109/mwscas.2007.4488594
Publikováno v:
Intensive Care Medicine ISBN: 9780387301563
Yearbook of Intensive Care and Emergency Medicine ISBN: 9783540301554
Yearbook of Intensive Care and Emergency Medicine ISBN: 9783540301554
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4e37fb00bf957280dc30d20b8bf911e7
https://doi.org/10.1007/0-387-35096-9_25
https://doi.org/10.1007/0-387-35096-9_25
Publikováno v:
ISCAS (3)
This paper describes the implementation of an area-efficient and protected user memory-mapped network interface, the pbuf (parcel buffer), for the data intensive architecture (DIVA) processing-in-memory (PIM) system. This implementation of the pbuf i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2983ae4cde4e222f069e1d01e1c4d8e
https://doi.org/10.1109/iscas.2005.1465246
https://doi.org/10.1109/iscas.2005.1465246
Publikováno v:
ISCAS (4)
Hardware support for floating-point (FP) arithmetic is a mandatory feature of modern microprocessor design. There are many alternatives in floating-point unit (FPU) design, and overall performance can be greatly affected by the organization of a floa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6fe775c2a94cebdcf4b01eea614e41ca
https://doi.org/10.1109/iscas.2005.1465341
https://doi.org/10.1109/iscas.2005.1465341
Publikováno v:
ISCAS (2)
The Data-Intensive Architecture (DIVA) system incorporates Processing-In-Memory (PIM) chips as smart-memory coprocessors to a microprocessor. This architecture exploits inherent memory bandwidth both on chip and across the system to target several cl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d259dd01d9a1d072c9eea23816f2a1e7
https://doi.org/10.1109/iscas.2004.1329306
https://doi.org/10.1109/iscas.2004.1329306