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pro vyhledávání: '"J. Otterstedt"'
Akademický článek
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Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 6:284-291
The architecture and implementation of a programmable video signal processor dedicated as building block of a multiple instruction multiple data (MIMD)-based bus-connected multiprocessor system is presented. This system can either be constructed from
Autor:
R. Allinger, K. Hofmann, Christian Peters, Mihail Jefremow, Doris Schmitt-Landsiedel, O. Bahlous, W. Allers, J. Otterstedt, S. Kassenetter, Thomas Kern
Publikováno v:
ISSCC
Spin-torque-transfer (STT) MRAM is a promising candidate for embedded non-volatile memory in next generation microcontrollers, because of superior endurance, low process costs and logic supply voltage operation. Two major drawbacks of STT-MRAM techno
Publikováno v:
IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part C. 19:105-109
A 16.6 cm/sup 2/ monolithic large-area integrated multiprocessor system comprising nine identical programmable video signal processing elements was reconfigured by excimer laser-formed connections and discontinuities of conductor lines in a redundant
Autor:
Jeon, Yu‐Rim1, Seo, Donguk2, Lee, Yoonmyung2, Akinwande, Deji1 deji@ece.utexas.edu, Choi, Changhwan3 cchoi@hanyang.ac.kr
Publikováno v:
Advanced Science. 8/21/2024, Vol. 11 Issue 31, p1-10. 10p.
Autor:
Trendafilova, Ivalina1 (AUTHOR) ivalina.trendafilova@orgchm.bas.bg, Popova, Margarita1 (AUTHOR)
Publikováno v:
Pharmaceutics. Aug2024, Vol. 16 Issue 8, p1004. 26p.
Akademický článek
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Publikováno v:
[1992] Proceedings International Conference on Wafer Scale Integration.
A defect-tolerant large area integrated circuit 16 cm/sup 2/ in size was implemented. It contains the test and configuration frame for a MIMD (multiple instruction, multiple data) multiprocessor architecture for video signal processing. The emphasis
Publikováno v:
1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon.
In this paper, an efficient method for self-test and self-reconfiguration for a word-oriented single-port static RAM is presented. First, a suitable test algorithm is chosen and implemented as a built-in self-test (BIST) with low area overhead. Furth
Publikováno v:
1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon.
A 16.6 cm/sup 2/ monolithic large area integrated multiprocessor system comprising 9 identical programmable video signal processing elements was reconfigured by excimer laser formed connections and discontinuities of conductor lines in a redundant bu