Zobrazeno 1 - 10
of 58
pro vyhledávání: '"J Priesol"'
Publikováno v:
2022 14th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM).
Autor:
Jan Kuzmik, Alexander Satka, Stanislav Hasenöhrl, J. Priesol, S. Hascik, Ales Chvala, Roman Stoklas, Peter Sichman
Publikováno v:
IEEE Transactions on Electron Devices. 68:2365-2371
Vertical current conduction in a 1.3- $\mu \text{m}$ -thick semi-insulating (SI) C-doped GaN grown on a GaN substrate is analyzed. During the growth, pressure was varied from 100 to 20 mbar in order to increase C concentration from $\sim 1\times 10^{
Publikováno v:
IEEE Transactions on Electron Devices. 68:216-221
The mapping of the current induced by a focused electron beam in a scanning electron microscope (SEM) has been used to localize electrically stressed regions in the AlGaN/GaN-on-Si Schottky barrier diode (SBD) structures cross-sectioned by the focuse
Autor:
Richard F. Lewis, Adrian J. Priesol, Farzad Ehtemam, Susan King, Shmuel E. Davidi, Daniel M. Merfeld
Publikováno v:
Scientific Reports, Vol 9, Iss 1, Pp 1-12 (2019)
Scientific Reports
Scientific Reports
Vestibular migraine (VM) is the most common cause of spontaneous vertigo but remains poorly understood. We investigated the hypothesis that central vestibular pathways are sensitized in VM by measuring self-motion perceptual thresholds in patients an
Characterization of Monolithic InAlN/GaN NAND Logic Cell Supported by Circuit and Device Simulations
Autor:
M. Blaho, Daniel Donoval, Ales Chvala, Lukas Nagy, Dagmar Gregušová, Juraj Marek, Jan Kuzmik, Alexander Satka, J. Priesol
Publikováno v:
IEEE Transactions on Electron Devices. 65:2666-2669
In this brief, the monolithic integration of enhancement (E)-mode and depletion (D)-mode InAlN/GaN high-electron mobility transistors (HEMTs) is presented. The aim of this brief is to show the results of the designed NAND logic cell, which consists o
Publikováno v:
DTIS
This paper presents large signal circuit models of InAlN/GaN monolithic integrated NAND and NOR logic gates. The models are calibrated automatically by artificial neural network (NN). Appropriate setting and properties for NN training is described. V
Autor:
Stanislav Hasenöhrl, Jan Kuzmik, Juraj Marek, Alexander Satka, Š. Haščík, Roman Stoklas, Peter Sichman, A. Vincze, J. Priesol, Edmund Dobročka, Ales Chvala, F. Gucmann
Publikováno v:
Materials Science in Semiconductor Processing. 118:105203
Samples comprising 1.3 μm-thick C-doped semi-insulating (SI) GaN layer sandwiched between two n-GaN layers were grown on sapphire or conductive GaN substrates by metal-organic chemical vapor phase epitaxy at varied reactor pressure between 100 and 2
Autor:
Claudio Fiegna, Enrico Sangiorgi, Steve Stoffels, Matteo Borga, Enrico Zanoni, Gaudenzio Meneghesso, Alexander Satka, Matteo Meneghini, Andrea Natale Tallarico, Niels Posthuma, J. Zheng, Stefaan Decoutere, Benoit Bakeroot, J. Priesol, Elena Fabris, Xiaohua Ma
Publikováno v:
IRPS
In this paper, we present an in-depth study of the gate leakage mechanisms and correlated breakdown of GaN-based power HEMTs with p-GaN gate, controlled by a Schottky metal/p-GaN junction. A detailed investigation of the process split and geometry de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a4189d939bd22e83bc60809518e07890
http://hdl.handle.net/11585/705164
http://hdl.handle.net/11585/705164
Autor:
Alexander Satka, M. Blah, Daniel Donoval, M. Vilhan, Lukas Nagy, J. Priesol, Dagmar Gregušová, Ales Chvala, Jan Kuzmik, Juraj Marek
Publikováno v:
2018 12th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM).
This paper presents simulation analysis of monolithic integrated InAlN/GaN NAND logic cell comprised of depletion-mode and dual-gate enhancement-mode high electron mobility transistors. Calibrated static and dynamic electrophysical models are propose
Autor:
Jan Kuzmik, M. Blaho, J. Priesol, Alexander Satka, Ales Chvala, Daniel Donoval, Lukas Nagy, Dagmar Gregušová, Juraj Marek
Publikováno v:
DTIS
In this paper, we present the monolithic integration of enhancement-mode and depletion-mode InAlN/GaN heterostructure high electron mobility transistors (HEMTs). The aim of the work is to show the results of the designed NAND logic cell which consist