Zobrazeno 1 - 10
of 45
pro vyhledávání: '"Jérémy Postel-Pellerin"'
Autor:
Franck Matteo, Karine Coulié, Roberto Simola, Jérémy Postel-Pellerin, Franck Melul, Arnaud Regnier
Publikováno v:
Microelectronics Reliability
Microelectronics Reliability, 2022, 136, pp.114717. ⟨10.1016/j.microrel.2022.114717⟩
Microelectronics Reliability, 2022, 136, pp.114717. ⟨10.1016/j.microrel.2022.114717⟩
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a6e5ee9f5076afa33366553e6caece88
https://hal.science/hal-03941108/file/Revised_EEPROM_endurance_degradation__final.pdf
https://hal.science/hal-03941108/file/Revised_EEPROM_endurance_degradation__final.pdf
Autor:
Hussein Bazzi, P. Canet, Hassen Aziza, Mathieu Moreau, Adnan Harb, Vincenzo Della Marca, Jérémy Postel-Pellerin
Publikováno v:
IEEE Transactions on Nanotechnology
IEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers, 2020, 19, pp.214-222. ⟨10.1109/TNANO.2020.2976735⟩
IEEE Transactions on Nanotechnology, 2020, 19, pp.214-222. ⟨10.1109/TNANO.2020.2976735⟩
IEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers, 2020, 19, pp.214-222. ⟨10.1109/TNANO.2020.2976735⟩
IEEE Transactions on Nanotechnology, 2020, 19, pp.214-222. ⟨10.1109/TNANO.2020.2976735⟩
International audience; A novel True Random Number Generator circuit fabricated in a 130nm HfO2-based resistive RAM process is presented. The generation of the random bit stream is based on a specific programming sequence applied to a dedicated memor
Publikováno v:
2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2020, Frascati, Italy. pp.1-4, ⟨10.1109/DFT50435.2020.9250726⟩
DFT
2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2020, Frascati, Italy. pp.1-4, ⟨10.1109/DFT50435.2020.9250726⟩
DFT
International audience; The intrinsic variability of the switching parameters in resistive memories has been a major wall that limits their adoption as the next generation memories. In contrast, this natural stochasticity can be beneficial for other
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e5f475cf6d856eb626f42aa6590f9289
https://hal.archives-ouvertes.fr/hal-03504288
https://hal.archives-ouvertes.fr/hal-03504288
Autor:
Mathieu Moreau, Hussein Bazzi, P. Canet, Hassen Aziza, Jérémy Postel-Pellerin, Vincenzo Della Marca, Adnan Harb
Publikováno v:
NVMTS
2019 19th Non-Volatile Memory Technology Symposium (NVMTS)
2019 19th Non-Volatile Memory Technology Symposium (NVMTS), Oct 2019, Durham, France. pp.1-5, ⟨10.1109/NVMTS47818.2019.9043369⟩
2019 19th Non-Volatile Memory Technology Symposium (NVMTS)
2019 19th Non-Volatile Memory Technology Symposium (NVMTS), Oct 2019, Durham, France. pp.1-5, ⟨10.1109/NVMTS47818.2019.9043369⟩
International audience; A novel True Random Number Generator circuit fabricated in a 130nm HfO2-based resistive RAM process is presented. The generation of the random bit stream is based on a specific programming sequence applied to a dedicated memor
Autor:
P. Canet, Sarra Souiki-Figuigui, Jean-Michel Portal, Jérémy Postel-Pellerin, P. Chiquet, Vincenzo Della Marca, Maxime Chambonneau, Guillaume Idda, David Grojo
Publikováno v:
Scientific Reports
Scientific Reports, Nature Publishing Group, 2019, 9 (7392), ⟨10.1038/s41598-019-43344-x⟩
Scientific Reports, Vol 9, Iss 1, Pp 1-10 (2019)
Scientific Reports, 2019, 9 (7392), ⟨10.1038/s41598-019-43344-x⟩
Scientific Reports, Nature Publishing Group, 2019, 9 (7392), ⟨10.1038/s41598-019-43344-x⟩
Scientific Reports, Vol 9, Iss 1, Pp 1-10 (2019)
Scientific Reports, 2019, 9 (7392), ⟨10.1038/s41598-019-43344-x⟩
The behaviour of semiconductor materials and devices subjected to femtosecond laser irradiation has been under scrutiny, for many reasons, during the last decade. In particular, recent works have shown that the specific functionality and/or geometry
Autor:
R. Wacquez, B. Dieny, G. Di Pendina, M. Kharbouche-Harrari, D. Aboulkassimi, J-M. Portal, Jérémy Postel-Pellerin
Publikováno v:
ISCAS
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, Sapporo, Japan. pp.1-5, ⟨10.1109/ISCAS.2019.8702734⟩
2019 IEEE International Symposium on Circuits and Systems (ISCAS)
2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, Sapporo, Japan. pp.1-5, ⟨10.1109/ISCAS.2019.8702734⟩
International audience; Internet of Things (IoT) applications deployment relies on low-power circuits. Nowadays, on top of power consumption, security concern has become a real issue. LightWeight Cryptography (LWC) has been developed to answer this c
Autor:
Jérémy Postel-Pellerin, Jean-Baptiste Decitre, Maminirina Joelson, P. Chiquet, Gilles Micolau
Publikováno v:
E3S Web of Conferences, Vol 88, p 05002 (2019)
E3S Web of Conferences (88), 05002. (2019)
E3S Web of Conferences
E3S Web of Conferences, EDP Sciences, 2019, 88, pp.05002. ⟨10.1051/e3sconf/20198805002⟩
E3S Web of Conferences, 2019, 88, pp.05002. ⟨10.1051/e3sconf/20198805002⟩
E3S Web of Conferences (88), 05002. (2019)
E3S Web of Conferences
E3S Web of Conferences, EDP Sciences, 2019, 88, pp.05002. ⟨10.1051/e3sconf/20198805002⟩
E3S Web of Conferences, 2019, 88, pp.05002. ⟨10.1051/e3sconf/20198805002⟩
International audience; Thanks to its low noise level, the LSBB environment provides particular environment to carry out high quality electrical characterizations. In this paper, we propose a complete modeling approach of the experimental results fro
Autor:
Rana Alhalabi, G. Di Pendina, R. Wacquez, D. Aboulkassimi, Jérémy Postel-Pellerin, Guillaume Prenat, M. Kharbouche-Harrari, Ioan Lucian Prejbeanu, Etienne Nowak
Publikováno v:
XXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS)
XXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS), Nov 2018, Lyon, France
HAL
DCIS
XXXIII CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS), Nov 2018, Lyon, France
HAL
DCIS
Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is one of the leading candidates for embedded memory convergence in advanced technology nodes. It is particularly adapted to low-power applications, requiring a decent level of performance
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c1b4f6377b08ff0df510c6aa87688e22
https://hal.archives-ouvertes.fr/hal-01982788
https://hal.archives-ouvertes.fr/hal-01982788
Autor:
P. Chiquet, V. Della Marca, Thibault Kempf, Marc Bocquet, Arnaud Regnier, Jérémy Postel-Pellerin
Publikováno v:
Microelectronics Reliability
Microelectronics Reliability, 2018, 88-90, pp.159-163. ⟨10.1016/j.microrel.2018.06.116⟩
Microelectronics Reliability, Elsevier, 2018, 88-90, pp.159-163. ⟨10.1016/j.microrel.2018.06.116⟩
Microelectronics Reliability, 2018, 88-90, pp.159-163. ⟨10.1016/j.microrel.2018.06.116⟩
Microelectronics Reliability, Elsevier, 2018, 88-90, pp.159-163. ⟨10.1016/j.microrel.2018.06.116⟩
International audience; Nowadays, the study of physical mechanisms that occur during Flash memory cell life is mandatory when reaching the 40nm and beyond nodes in terms of reliability. In this paper we carry out a complete experimental method to ext
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d3605fbb8c163708076de3b62d0f8f4e
https://hal.science/hal-01900789/file/DellaMarca_MR_2018_vf_rw.pdf
https://hal.science/hal-01900789/file/DellaMarca_MR_2018_vf_rw.pdf
Autor:
J-M. Portal, D. Aboulkassimi, Ricardo C. Sousa, M. Kharbouche-Harrari, Marc Bocquet, Jérémy Postel-Pellerin, R. Delattre, G. Di Pendina, R. Wacquez
Publikováno v:
2018 IEEE 24th International Symposium on
Testing And Robust System Design (IOLTS)
Testing And Robust System Design (IOLTS), Jul 2018, Platja d'Aro, Spain. pp.243-244, ⟨10.1109/IOLTS.2018.8474088⟩
Testing And Robust System Design (IOLTS), Jul 2018, Platja d'Aro, Spain. ⟨10.1109/IOLTS.2018.8474088.⟩
IOLTS
Testing And Robust System Design (IOLTS)
Testing And Robust System Design (IOLTS), Jul 2018, Platja d'Aro, Spain. pp.243-244, ⟨10.1109/IOLTS.2018.8474088⟩
Testing And Robust System Design (IOLTS), Jul 2018, Platja d'Aro, Spain. ⟨10.1109/IOLTS.2018.8474088.⟩
IOLTS
International audience; The Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) has been identified, by the International Technology Roadmap for Semiconductors (ITRS), as one of the most promising emerging technology. Different works handle
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::78a24ab54f71b9134a5105299e0050af
https://hal.science/hal-01976697
https://hal.science/hal-01976697