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Predicting timing behavior is key to efficient embedded real-time system design and verification. Current approaches to determine end-to-end latencies in parallel heterogeneous architectures focus on performance analysis either on task or system leve
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https://explore.openaire.eu/search/publication?articleId=doi_________::bb54f6c46d44dc299204afd7d1b60193
Many approaches to determine the response time of a task have difficulty to model tasks with multiple memory or coprocessor accesses with variable access times during the execution. As the request times highly depend on system setup and state, they c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9fcd67514f067b9c02db68cb5dc75811
Autor:
Ivers, Matthias, Ernst, Rolf
Publikováno v:
Quality of Service in Heterogeneous Networks; 2009, p280-296, 17p
Publikováno v:
Proceedings of the 6th IEEE/ACM/IFIP International Conference: Hardware/Software Codesign & System Synthesis; 10/19/2008, p185-190, 6p
Publikováno v:
Proceedings of the 4th International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS '06); Oct2006, p288-293, 6p