Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Itir Akgun"'
Publikováno v:
IEEE Micro. 39:46-53
Monolithic three-dimensional (M3D) integration is viewed as a promising improvement over through-silicon-via-based 3-D integration due to its greater inter-tier connectivity, higher circuit density, and lower parasitic capacitance. With M3D integrati
Autor:
Xin Ma, Xiaochun Ye, Han Li, Lei Deng, Abanti Basak, Zhimin Zhang, Peng Gu, Dongrui Fan, Mingyu Yan, Shuangchen Li, Yuan Xie, Itir Akgun, Xing Hu, Yujing Feng
Publikováno v:
MICRO
Graph analytics is an emerging application which extracts insights by processing large volumes of highly connected data, namely graphs. The parallel processing of graphs has been exploited at the algorithm level, which in turn incurs three irregulari
Autor:
Xing Hu, Itir Akgun, Yuan Xie, Xin Ma, Xiaochun Ye, Han Li, Dongrui Fan, Zhimin Zhang, Shuangchen Li, Mingyu Yan, Lei Deng
Publikováno v:
ISLPED
Domain-specific accelerators for graph analytics leverage a large on-chip memory in order to tackle the intensive random memory accesses, offering higher performance and energy efficiency than conventional architectures. However, limited by the ineff
Publikováno v:
DAC
Emerging Monolithic Three-Dimensional (M3D) integration technology will not only provide improved circuit density through the high-bandwidth coupling of multiple vertically-stacked layers, but it can also provide new architectural opportunities for o
Publikováno v:
SLIP
Interposer-based packaging is becoming a widespread methodology for tightly integrating multiple heterogeneous dies into a single package, with the potential to improve manufacturing yield and build larger-than-reticle-sized systems. However, interpo
Publikováno v:
DATE
Homomorphic encryption is a promising technology for enabling various privacy-preserving applications such as secure biomarker search. However, current implementations are not practical due to large performance overheads. A homomorphic encryption sch
Publikováno v:
ISCA
High-performance computing, enterprise, and datacenter servers are driving demands for higher total memory capacity as well as memory performance. Memory "cubes" with high per-package capacity (from 3D integration) along with high-speed point-to-poin
Publikováno v:
ICCAD
Due to the increasing fabrication and design complexity with new process nodes, the cost per transistor trend originally identified in Moore's Law is slowing when using traditional integration methods. However, emerging die-level integration technolo
Publikováno v:
ICCD
Three-dimensional (3D) integration is considered as a solution to overcome capacity, bandwidth, and performance limitations of memories. However, due to thermal challenges and cost issues, industry embraced 2.5D implementation for integrating die-sta
Publikováno v:
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).