Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Itaru Oshiyama"'
Autor:
Sozo Yokogawa, Itaru Oshiyama, Harumi Ikeda, Yoshiki Ebiko, Tomoyuki Hirano, Suguru Saito, Takashi Oinoue, Yoshiya Hagimoto, Hayato Iwamoto
Publikováno v:
Scientific Reports, Vol 7, Iss 1, Pp 1-9 (2017)
Abstract We report on the IR sensitivity enhancement of back-illuminated CMOS Image Sensor (BI-CIS) with 2-dimensional diffractive inverted pyramid array structure (IPA) on crystalline silicon (c-Si) and deep trench isolation (DTI). FDTD simulations
Externí odkaz:
https://doaj.org/article/16be2a0f87194729aa205b6c3d07b156
Autor:
S. Saito, T. Shigetoshi, T. Okawa, T. Oinoue, T. Hirano, N. Sumitani, Hayato Iwamoto, Yoshiya Hagimoto, Y. Ebiko, I. Mita, K. Yokochi, Itaru Oshiyama, Y. Kitano
Publikováno v:
2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).
We have developed a back-illuminated CMOS image sensor (BI -CIS) using a pseudo high refractive index film (pHRF) consisting of an array of minute holes. The new process architecture for the low reflectivity surface is achieved by integrating the dir
Autor:
H. Ikeda, Y. Ebiko, Yoshiya Hagimoto, Itaru Oshiyama, Hayato Iwamoto, T. Oinoue, S. Yokogawa, T. Hirano, S. Saito
Publikováno v:
2017 IEEE International Electron Devices Meeting (IEDM).
We demonstrated the near-infrared (NIR) sensitivity enhancement of back-illuminated complementary metal oxide semiconductor image sensors (BI-CIS) with a pyramid surface for diffraction (PSD) structures on crystalline silicon and deep trench isolatio
Autor:
Harumi Ikeda, Itaru Oshiyama, Yokogawa Sozo, Yoshiya Hagimoto, Suguru Saito, Hayato Iwamoto, Ebiko Yoshiki, Tomoyuki Hirano, Takashi Oinoue
Publikováno v:
Scientific Reports
Scientific Reports, Vol 7, Iss 1, Pp 1-9 (2017)
Scientific Reports, Vol 7, Iss 1, Pp 1-9 (2017)
We report on the IR sensitivity enhancement of back-illuminated CMOS Image Sensor (BI-CIS) with 2-dimensional diffractive inverted pyramid array structure (IPA) on crystalline silicon (c-Si) and deep trench isolation (DTI). FDTD simulations of semi-i
Autor:
Hayato Iwamoto, Yukio Tagawa, Kazuaki Tanaka, Masaharu Oshima, Masanori Tsukamoto, Ryo Yamamoto, J. Wang, Yoshiya Hagimoto, Shingo Kadomura, Takayuki Uemura, Naoki Nagashima, Saori Kanda, Y. Tateshita, Koji Watanabe, Hitoshi Wakabayashi, Masaki Saito, Kaori Tai, Tomoyuki Hirano, Itaru Oshiyama, S. Yamaguchi, Takashi Ando, Satoshi Toyoda
Publikováno v:
Japanese Journal of Applied Physics. 47:2379-2382
In this paper, we demonstrate a wet treatment for the HfSix/HfO2 gate stack of n-type metal oxide semiconductor field effect transistor (nMOSFET) fabricated by a gate-last process in order to scale down the electrical thickness at inversion state Tin
Autor:
Yukio Tagawa, Hitoshi Wakabayashi, Y. Tateshita, Tomoyuki Hirano, Kazuki Tanaka, Naoki Nagashima, S. Yamaguchi, Kaori Tai, Sayuri Kanda, Hayato Iwamoto, Masaki Saito, Mayumi Yamanaka, Takashi Ando, Masanori Tukamoto, Shingo Kadomura, Masashi Nakata, Itaru Oshiyama, Salam Kazi, Ryo Yamamoto
Publikováno v:
Japanese Journal of Applied Physics. 47:2345-2348
We propose a fluorine (F) treatment technique that is suitable for threshold voltage (Vth) modulation in p-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) with the atomic layer deposition (ALD) TiN/HfO2 gate structure. A wor
Autor:
Tomoki Hirano, Shingo Kadomura, S. Kazi, R. Yamamoto, Naoki Nagashima, Masanori Tsukamoto, Kenji Tanaka, S. Kanda, Hayato Iwamoto, Masanobu Saito, T. Ando, Y. Tateshita, Masashi Nakata, M. Yamanaka, K. Tai, Hitoshi Wakabayashi, Itaru Oshiyama, S. Yamaguchi, Y. Tagawa
Publikováno v:
Extended Abstracts of the 2007 International Conference on Solid State Devices and Materials.
Autor:
Masaharu Oshima, Y. Tagawa, M. Saito, R. Yamamoto, Kaori Tai, Hitoshi Wakabayashi, S. Kanda, Y. Tateshita, Itaru Oshiyama, Hayato Iwamoto, Shingo Kadomura, S. Yamaguchi, K. Tanaka, Masanori Tsukamoto, T. Hirano, K. Watanabe, Naoki Nagashima, Hiroshi Kumigashira, Masashi Nakata, Takashi Ando, Satoshi Toyoda
Publikováno v:
2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).
The impacts of interfacial layer (IFL) thickness and crystallinity of HfO2/IFL bi-layer on electrical properties were clarified using synchrotron radiation photoemission spectroscopy (SRPES) and electrical measurements of nFETs (HfSix/HfO2) and pFETs
Autor:
J. Wang, S. Kanda, S. Yamaguchi, Tomoki Hirano, Yoshiya Hagimoto, Itaru Oshiyama, R. Yamamoto, Satoshi Toyoda, Hayato Iwamoto, Shingo Kadomura, T. Uemura, Masaharu Oshima, T. Ando, Y. Tagawa, Naoki Nagashima, K. Tai, Y. Tateshita, Masanobu Saito, Koji Watanabe, Hitoshi Wakabayashi, Masanori Tsukamoto, K. Tanaka
Publikováno v:
Extended Abstracts of the 2007 International Conference on Solid State Devices and Materials.
Autor:
S. Kanda, S. Yamaguchi, K. Tanaka, Hitoshi Wakabayashi, R. Yamamoto, Hayato Iwamoto, T. Hirano, J. Wang, Yuki Miyanami, K. Kugimiya, Itaru Oshiyama, Yoshihiko Nagahama, K. Ogawa, Y. Tagawa, Naoki Nagashima, Shinya Yamakawa, Masaki Saito, Masashi Nakata, Satoru Mayuzumi, Yoshiya Hagimoto, Y. Tateshita, Masanori Tsukamoto, Shingo Kadomura, Kaori Tai, K. Nagano, Y. Yamamoto
Publikováno v:
2007 IEEE International Electron Devices Meeting.
Extreme high-performance n- and pFETs are achieved as 1300 and 1000 uA/um at Ioff = 100 nA/um and Vdd = 1.0 V, respectively, by applying newly proposed booster technologies. The combination of top-cut dual-stress liners and damascene gate remarkably