Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Irina Ionica"'
Autor:
Baydaa Obeid, Lionel Bastard, Valentin Aubriet, Kristell Courouble, Didier Dutartre, Irina Ionica
Publikováno v:
ECS Transactions. 108:19-30
In applications such as image sensors or solar cells, the performance of the device can be improved thanks to the passivation of the silicon substrate using high-k dielectrics such as alumina, hafnium dioxide etc. To assess the quality of the dielect
Autor:
Sorin Cristoloveanu, Gerard Ghibaudo, Licinius Benea, Yasuhisa Omura, Shingo Sato, Irina Ionica
Publikováno v:
Solid-State Electronics
Solid-State Electronics, Elsevier, 2019, 159, pp.197-203. ⟨10.1016/j.sse.2019.03.059⟩
Solid-State Electronics, Elsevier, 2019, 159, pp.197-203. ⟨10.1016/j.sse.2019.03.059⟩
This paper discusses the impact of both contact and channel resistance on capacitance and conductance characteristics measured with pseudo-MOSFET method by analyzing the impedance and admittance in frequency domain. We clarify the mechanisms affectin
Autor:
Irina Ionica, Dimitrios Damianos, Baydaa Obeid, Anne Kaminski, Danièle Blanc-Pélissier, Guy Vitrant, Gérard Ghibaudo, Sorin Cristoloveanu, Aude Bouchard, Xavier Mescot, Martine Gri, Ming Lei, Lionel Bastard
Publikováno v:
ECS Meeting Abstracts. :1055-1055
Dielectric layers are deposited on semiconductor materials for many applications, either in the active stacks of the devices (e.g. the gate dielectric in a metal-oxide-semiconductor transistor) or as passivation solutions (e.g. in image sensors [1],
Autor:
Aude Bouchard, Brian Larzelere, Guy Vitrant, Irina Ionica, Gerard Ghibaudo, Sorin Cristoloveanu, Anne Kaminski, Lionel Bastard, D. Blanc-Pelissier, Martine Gri, Ming Lei, Xavier Mescot, D. Damianos
Publikováno v:
ECS Transactions
ECS Transactions, Electrochemical Society, Inc., 2020, 97 (1), pp.119-130. ⟨10.1149/09701.0119ecst⟩
ECS Transactions, Electrochemical Society, Inc., 2020, 97 (1), pp.119-130. ⟨10.1149/09701.0119ecst⟩
The quality of interfaces between dielectrics and semiconductors has a tremendous impact on the performances of semiconductor devices. High-k dielectrics are omnipresent in the gate stack of advanced MOSFETs. They are also used as passivation layers
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4c559a9982bbfb0bde00b2f71dba9c2d
https://hal.archives-ouvertes.fr/hal-02861584
https://hal.archives-ouvertes.fr/hal-02861584
Autor:
Mireille Mouis, Maxime Legallais, Thibauld Cazimajou, Fanny Morisot, Thuy Thi Thu Nguyen, Monica Vallejo Perez, Céline Ternon, Valerie Stambouli, gerard ghibaudo, Bassem Salem, Christoforos Theodorou, Irina Ionica, Ganesh Jayakumar, Per-Erik Hellstrom, Saul Rodriguez, Joachim Luque, Claudio Zuliani, Karl Rohracher, Kudlaty, J.
Publikováno v:
HAL
Journées Nationales Nanofils Semiconducteurs Journées Nationales Nanofils Semiconducteurs, Lyon, 13-15 Nov. 2019
Journées Nationales Nanofils Semiconducteurs Journées Nationales Nanofils Semiconducteurs, Lyon, 13-15 Nov. 2019, Nov 2019, Lyon, France
Journées Nationales Nanofils Semiconducteurs Journées Nationales Nanofils Semiconducteurs, Lyon, 13-15 Nov. 2019
Journées Nationales Nanofils Semiconducteurs Journées Nationales Nanofils Semiconducteurs, Lyon, 13-15 Nov. 2019, Nov 2019, Lyon, France
International audience
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::a648198bedd15b49220648026f0f5f16
https://hal.univ-grenoble-alpes.fr/hal-02400730
https://hal.univ-grenoble-alpes.fr/hal-02400730
Publikováno v:
Solid-State Electronics
Solid-State Electronics, Elsevier, 2015, 112, pp.29-36. ⟨10.1016/j.sse.2015.02.009⟩
Solid-State Electronics, 2015, 112, pp.29-36. ⟨10.1016/j.sse.2015.02.009⟩
Solid-State Electronics, Elsevier, 2015, 112, pp.29-36. ⟨10.1016/j.sse.2015.02.009⟩
Solid-State Electronics, 2015, 112, pp.29-36. ⟨10.1016/j.sse.2015.02.009⟩
International audience; The parasitic bipolar effect is investigated in fully-depleted silicon-on-insulator (FD SOI) n-type MOSFETs with ultra-thin films (5–10 nm). Our measurements show that at low drain bias the drain leakage current is governed
Autor:
Médéric Vindret, Licinius Benea, Irina Ionica, Cécile Delacour, Pascal Xavier, Jean Martins, Dominique Rauly, Eric Chamberod
Publikováno v:
HAL
International Workshop on Semi-conducting Nanomaterials for Health, Environment and Security Applications
International Workshop on Semi-conducting Nanomaterials for Health, Environment and Security Applications, Nanonets2Sense, Nov 2018, Grenoble, France
International Workshop on Semi-conducting Nanomaterials for Health, Environment and Security Applications
International Workshop on Semi-conducting Nanomaterials for Health, Environment and Security Applications, Nanonets2Sense, Nov 2018, Grenoble, France
session Devices; International audience; Fast detection of bacteria is crucial in several domains such as health care, food industry and for environmental applications. Classical methods suffer from some drawbacks. For instance, traditional culture i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::f2fdceca377f6373ee794616b74ab535
https://hal.archives-ouvertes.fr/hal-02016817
https://hal.archives-ouvertes.fr/hal-02016817
Autor:
Irina Ionica, Carlos Navarro, Maryline Bawedin, Sorin Cristoloveanu, Sylvain Barraud, Abhinav Kranti, Mukta Singh Parihar, Fanyu Liu
Publikováno v:
Solid-State Electronics
Solid-State Electronics, Elsevier, 2016, 125, pp.154-160. ⟨10.1016/j.sse.2016.07.016⟩
Solid-State Electronics, 2016, 125, pp.154-160. ⟨10.1016/j.sse.2016.07.016⟩
Solid-State Electronics, Elsevier, 2016, 125, pp.154-160. ⟨10.1016/j.sse.2016.07.016⟩
Solid-State Electronics, 2016, 125, pp.154-160. ⟨10.1016/j.sse.2016.07.016⟩
International audience; This work addresses the effect of inter-gate coupling on back-channel characteristics of planar accumulation-mode junctionless (JL) MOSFETs, fabricated with advanced Fully Depleted Silicon-on-Insulator (FDSOI) technology. A sy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f7acf31b78e02a86c53f494a733a45b5
https://hal.archives-ouvertes.fr/hal-02003150
https://hal.archives-ouvertes.fr/hal-02003150
Publikováno v:
ECS Transactions. 50:249-258
The pseudo-MOSFET (Ψ-MOSFET) is a fascinating transistor based on the upside-down MOS configuration of semiconductor-on-insulator (SOI) wafers. This technique has been conceived for quick characterization of as-grown SOI materials. MOSFET-like chara
Autor:
Fan Yu Liu, Irina Ionica, Mukta Singh Parihar, Carlos Navarro, Sylvain Barraud, Sorin Cristoloveanu, Maryline Bawedin, Abhinav Kranti
Publikováno v:
ESSDERC
2015 ESSDERC Proceedings
2015 ESSDERC-45th European Solid-State Device Research Conference
2015 ESSDERC-45th European Solid-State Device Research Conference, Sep 2015, Graz, Austria. pp.282-285, ⟨10.1109/ESSDERC.2015.7324769⟩
2015 ESSDERC Proceedings
2015 ESSDERC-45th European Solid-State Device Research Conference
2015 ESSDERC-45th European Solid-State Device Research Conference, Sep 2015, Graz, Austria. pp.282-285, ⟨10.1109/ESSDERC.2015.7324769⟩
session C4L-E: Characterization of Advanced Devices; International audience; The work addresses effect of inter-gate coupling on back-channel characteristics of planar accumulation-mode junctionless (JL) MOSFETs, fabricated with advanced FDSOI techno