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Software Development Vehicles to enable extended and early co-design: a RISC-V and HPC case of study
Autor:
Mantovani, Filippo, Vizcaino, Pablo, Banchelli, Fabio, Garcia-Gasulla, Marta, Ferrer, Roger, Ieronymakis, Giorgos, Dimou, Nikos, Papaefstathiou, Vassilis, Labarta, Jesus
Prototyping HPC systems with low-to-mid technology readiness level (TRL) systems is critical for providing feedback to hardware designers, the system software team (e.g., compiler developers), and early adopters from the scientific community. The typ
Externí odkaz:
http://arxiv.org/abs/2306.01797