Zobrazeno 1 - 10
of 352
pro vyhledávání: '"ISA specification"'
Machine-readable specifications for the Armv8 instruction set architecture have become publicly available as part of Arm’s release processes, providing an official and unambiguous source of truth for the semantics of Arm instructions. To date, comp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::55d74604dc8bb6eaefaec136993c5a96
Autor:
Colley, John, Butler, Michael
Microprocessor pipelining is a well-established technique that improves performance and reduces power consumption by overlapping instruction execution. Verifying, however, that an implementation meets this ISA specification is complex and time-consum
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od_______348::124794444b4b2d8698f1fc4bb22ad3ee
https://eprints.soton.ac.uk/272590/
https://eprints.soton.ac.uk/272590/
Autor:
Anthony Fox
Publikováno v:
Interactive Theorem Proving ISBN: 9783642323461
ITP
ITP
This rough diamond presents a new domain-specific language (DSL) for producing detailed models of Instruction Set Architectures, such as ARM and x86. The language’s design and methodology is discussed and we propose future plans for this work. Feed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::245431b9a4eb14d53a018f2474df9341
https://doi.org/10.1007/978-3-642-32347-8_23
https://doi.org/10.1007/978-3-642-32347-8_23
Kniha
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Autor:
Himmelbauer, Simon, Hochrainer, Christoph, Huber, Benedikt, Mischkulnig, Niklas, Paulweber, Philipp, Schwarzinger, Tobias, Krall, Andreas
The Vienna Architecture Description Language (VADL) is a powerful processor description language (PDL) that enables the concise formal specification of processor architectures. By utilizing a single VADL processor specification, the VADL system exhib
Externí odkaz:
http://arxiv.org/abs/2402.09087
Autor:
Reid, Alastair David
One of the most important interfaces in a computer system is the interface between hardware and software. This interface is the contract between the hardware designer and the programmer that defines the functional behaviour of the hardware. This thes
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c7ba4fbc2890bfee43a71ba91f4f87aa
Autor:
Chisnall, David1 (AUTHOR)
Publikováno v:
Communications of the ACM. May2024, Vol. 67 Issue 5, p60-66. 7p.
Akademický článek
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Autor:
Antón, Anna Lena Duque, Müller, Johannes, Schmitz, Philipp, Jauch, Tobias, Wezel, Alex, Deutschmann, Lucas, Fadiheh, Mohammad Rahmani, Stoffel, Dominik, Kunz, Wolfgang
Protecting data in memory from attackers continues to be a concern in computing systems. CHERI is a promising approach to achieve such protection, by providing and enforcing fine-grained memory protection directly in the hardware. Creating trust for
Externí odkaz:
http://arxiv.org/abs/2407.18679
Autor:
Merniz, S., Benmohammed, M.
Publikováno v:
International Journal of Computers & Applications; 2010, Vol. 32 Issue 1, p84-92, 9p