Zobrazeno 1 - 10
of 317
pro vyhledávání: '"I.G. Thayne"'
Autor:
Martin Christopher Holland, Matthias Passlack, Yee-Chia Yeo, Peter Ramvall, Stephen Thoms, I.G. Thayne, T. Vasen, Douglas Macintyre, R. Droopad, Shyh-Wei Wang, R. Contreras-Guerrero, J.S. Rojas-Ramirez, Richard Kenneth Oxland, Xu Li, Gerben Doornbos, Carlos H. Diaz, Chang Yen-An, S. W. Chang
Publikováno v:
IEEE Electron Device Letters. 37:261-264
We report the first demonstration of InAs FinFETs with fin width $\textrm {W}_{{\mathrm{fin}}}$ in the range 25–35 nm, formed by inductively coupled plasma etching. The channel comprises defect-free, lattice-matched InAs with fin height $\textrm {H
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::428c53c41e7cfe6a9a174acf3dcaa84d
https://doi.org/10.1109/led.2016.2521001
https://doi.org/10.1109/led.2016.2521001
Publikováno v:
Microscopy and Microanalysis. 23:1476-1477
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b2b18403e2be8b06826fce3ec46180fa
https://doi.org/10.1017/s1431927617008042
https://doi.org/10.1017/s1431927617008042
Publikováno v:
Microelectronic Engineering. 86:1067-1070
This paper presents two separate methods for the fabrication of 10nm footprint T-gates using a two-step gate process. We examine the limits of lithographic and pattern transfer processes using the exposure of ZEP520A resist by electron beam lithograp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54ce602be87b131634482d6178aa80ea
https://doi.org/10.1016/j.mee.2008.12.029
https://doi.org/10.1016/j.mee.2008.12.029
Autor:
P. Longo, C.R. Stanley, Gary W. Paterson, Alan J. Craven, W. Reid, Martin Christopher Holland, A. R. Long, I.G. Thayne, R. Gregory
Publikováno v:
Microelectronic Engineering. 86:244-248
Ga"2O"3/GdGaO dielectric stacks have been grown on GaAs for MOSFETs. This paper highlights variations in the characteristics of GdGaO as the Gd flux, Ga"2O flux and substrate temperature are changed. The growth rate, composition, crystallinity are di
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3a71f1c6eebaf7642466af67de3f82e5
https://doi.org/10.1016/j.mee.2008.01.043
https://doi.org/10.1016/j.mee.2008.01.043
Publikováno v:
Microelectronic Engineering. 85:996-999
This paper investigates a low damage reactive ion etch (RIE) process to make thin silicon nitride sidewall spacers for the fabrication of self-aligned sub-100nm gate length III-V metal-oxide-semiconductor field-effect-transistors (MOSFETs). Self-alig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::697f079b872933ca14e108f89dc02b4a
https://doi.org/10.1016/j.mee.2007.12.064
https://doi.org/10.1016/j.mee.2007.12.064
Publikováno v:
Microelectronic Engineering. 85:1375-1378
This paper reports a new method for the fabrication of sub-25nm T-gates for high electron mobility transistors (HEMTs). For robust fabrication, it may be advantageous to employ a two-step process where the gate foot and head can be separately defined
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::383bc894617f94d88c0931b4ab74fbfc
https://doi.org/10.1016/j.mee.2008.01.058
https://doi.org/10.1016/j.mee.2008.01.058
Autor:
I.G. Thayne, A. R. Long, Asen Asenov, Karol Kalna, Ravindranath Droopad, Hill Richard J, Matthias Passlack, David A. J. Moran, J.A. Wilson
Publikováno v:
IEEE Transactions On Nanotechnology. 6:106-112
The potential performance of implant free heterostructure In0.3Ga0.7As channel MOSFETs with gate lengths of 30, 20, and 15 nm is investigated using state-of-the-art Monte Carlo (MC) device simulations. The simulations are carefully calibrated against
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2d2f4157b814ebfc974290a22ff4a33c
https://doi.org/10.1109/tnano.2006.888543
https://doi.org/10.1109/tnano.2006.888543
Autor:
Gary W. Paterson, Hill Richard J, A. R. Long, I.G. Thayne, David A. J. Moran, Ravindranath Droopad, Matthias Passlack, J.A. Wilson
Publikováno v:
Materials Science and Engineering: B. 135:277-281
Test devices have been fabricated on a specially grown GaAs/AlGaAs wafer with a 10 nm Ga2 O3 gate dielectric. The wafer has two GaAs transport channels either side of an AlGaAs barrier containing a δ -doping layer. Gate leakage measurements with dif
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c1f89c487311373ed8cd45a5e780667a
https://doi.org/10.1016/j.mseb.2006.08.026
https://doi.org/10.1016/j.mseb.2006.08.026
Autor:
Martin Christopher Holland, Douglas Macintyre, Xu Li, Stephen Thoms, C. D. W. Wilkinson, X. Cao, I.G. Thayne, Haiping Zhou
Publikováno v:
Microelectronic Engineering. 83:1159-1162
This paper investigates reactive ion etching (RIE) of sputtered tungsten films, a suitable candidate for gate metallization in compound semiconductor based high mobility channel devices, with the aim of developing a detailed understanding of the effe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::55a8acfaec1e1dd4fab23675a273c8c4
https://doi.org/10.1016/j.mee.2006.01.074
https://doi.org/10.1016/j.mee.2006.01.074
Surface mass spectrometric analysis of SiCl4/SiF4/O2 dry etch gate recessed 120nm T-gate GaAs pHEMTs
Publikováno v:
Microelectronic Engineering. :233-238
In addition to the importance of the geometry of the gate recess trench in high performance 120nm gate length GaAs pseudomorphic high electron mobility transistors (pHEMTs), the recess etch surface condition is also a key parameter. Selective dry etc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b21bfb6e8284f10399dae7149331133a
https://doi.org/10.1016/j.mee.2004.12.032
https://doi.org/10.1016/j.mee.2004.12.032