Zobrazeno 1 - 10
of 26
pro vyhledávání: '"Hyunyoon Cho"'
Publikováno v:
IEEE Access, Vol 6, Pp 31387-31398 (2018)
Computer servers are equipped with an increasing number of memory modules each with more capacity, making main-memory systems now the second most energy-consuming component trailing only processors in big-memory servers. These big-memory servers and
Externí odkaz:
https://doaj.org/article/5c9a7583d84448909448e4138b52ac87
Autor:
Hyunsub Norbert Rie, Chang Soo Yoon, Jindo Byun, Sucheol Lee, Garam Kim, Joohwan Kim, Junyoung Park, Hyunyoon Cho, Youngdo Um, Hyungmin Jin, Kwangseob Shin, Minsu Jung, Go-Eun Cha, Minjae Lee, YoungMin Kim, Byeori Han, Yuseong Jeon, Jisun Lee, EunSeok Shin, Hyuk-Jun Kwon, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Autor:
Joohwan Kim, Junyoung Park, Jindo Byun, Changkyu Seol, Chang Soo Yoon, EunSeok Shin, Hyunyoon Cho, Youngdo Um, Sucheol Lee, Hyungmin Jin, Kwangseob Shin, Hyunsub Norbert Rie, Minsu Jung, Jin-Hee Park, Go-Eun Cha, Minjae Lee, YoungMin Kim, Byeori Han, Yuseong Jeon, Jisun Lee, Hyejeong So, Sungduk Kim, Wansoo Park, Tae young Kim, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Sang-Hyun Lee
Publikováno v:
2022 IEEE Custom Integrated Circuits Conference (CICC).
Autor:
Hyungmin Jin, Jindo Byun, Hyunyoon Cho, Hojun Yoon, Jin-Hee Park, Kyoungsoo Kim, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Sang-Hyun Lee
Publikováno v:
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Autor:
Jindo Byun, Young-Min Kim, Hyungmin Jin, Young-Chul Cho, Young-don Choi, Jung-Hwan Choi, Hyunyoon Cho, Hyung-Jong Ko, Changsik Yoo, Jae-Woo Park, Jung Won-Joo, Hojun Yoon, Baekjin Lim, Sanghyun Lee
Publikováno v:
ESSCIRC
In this paper, a quadrature error corrector (QEC) for next generation DRAM interface is proposed. The proposed QEC corrects duty-cycle error and 4-phase skew simultaneously for high speed operation in DRAMs. The internally used half rate two-phase cl
Autor:
Kim Sang-Yun, Junghwan Park, Soo-bong Chang, Won-Il Bae, Ki-Won Park, Hyuck-Joon Kwon, Seung-Jun Bae, Geun-Tae Park, Hyung-Joon Chi, Kyung-Ho Lee, Hye-In Choi, Ji-Suk Kwon, Gil-Young Kang, Seung-Jun Lee, Hyunyoon Cho, Jin-Seok Heo, Young-Soo Sohn, Lim Suk-Hyun, Kyung Ryun Kim, Kwang-Il Park, Daesik Moon, Chang-Kyo Lee, Jae-Hoon Jung, Dongkeon Lee, Chang-Ho Shin, Cheol Kim, Jung-Bae Lee, Young-Il Lim, Dae Hyun Kim, Jinsol Park, Seouk-Kyu Choi, Jin-Hun Jang, Ki-Han Kim, Young Hoon Son, Byongwook Na, Isak Hwang, Duk-ha Park, Su-Yeon Doo, Choi Yeon-Kyu
Publikováno v:
ISSCC
Energy efficiency in mobile devices is a pivotal criteria from the overall system point of view, Although the 7,5Gb/s 8Gb LPDDR5 [1], with low-power schemes (internal data copy, dynamic-voltage-frequency scaling (DVFS), and a deep-sleep mode (DSM)),
Publikováno v:
IEEE Access, Vol 6, Pp 31387-31398 (2018)
Computer servers are equipped with an increasing number of memory modules each with more capacity, making main-memory systems now the second most energy-consuming component trailing only processors in big-memory servers. These big-memory servers and
Publikováno v:
IEEE Computer Architecture Letters. 16:76-79
Memory access latency has significant impact on application performance. Unfortunately, the random access latency of DRAM has been scaling relatively slowly, and often directly affects the critical path of execution, especially for applications with
Autor:
Soo-bong Chang, Young-Soo Sohn, Hyuck-Joon Kwon, Duk-ha Park, Hyong-Ryol Hwang, Junghwan Park, Kwang-II Park, Choi Yeon-Kyu, Young Hoon Son, Hyunyoon Cho, Byongwook Na, Hyung-Joon Chi, Lim Suk-Hyun, Jin-Hun Jang, Tae-Young Oh, Seung-Jun Shin, Seouk-Kyu Choi, Daesik Moon, Kim Sang-Yun, Ki-Won Park, Seong-Jin Jang, Hyo-Joo Ahn, Jung-Hwan Choi, Seungseob Lee, Chang-Kyo Lee, Dongkeon Lee, Young-Hwa Kim, Youn-sik Park, Kyung-Soo Ha, Seok-Hun Hyun
Publikováno v:
ISSCC
High-speed and low-power techniques for the latest mobile DRAMs, such as LPDDR4/4X [1–3], have been developed to enable high-resolution displays, multiple cameras and 4G communication in mobile devices. However, DRAM with higher bandwidth and lower
Autor:
Seung-Jun Bae, Jongwook Park, Young-Soo Sohn, Taesung Kim, Sewon Eom, Young-Seok Kim, Hyuck-Joon Kwon, Daesik Moon, Seong-Hwan Kim, Ki-Ho Kim, Seungseob Lee, Eungsung Seo, Jin-Hyeok Baek, Yoon-Joo Eom, Kyoung-Ho Kim, Jung-Hwan Choi, Tae-Young Oh, Gil-Hoon Cha, Seok-Hun Hyun, Yoon-Gyu Song, Youn-sik Park, Kyung-Soo Ha, Young Hoon Son, Dae-Hee Jung, In-Dal Song, Kwang-Il Park, Hyunyoon Cho, Bo-Tak Lim, Chang-Kyo Lee, Si-Hyeong Cho, Joon-Young Park, Junha Lee, Jin-Seok Heo, Young-Ryeol Choi, Seong-Jin Jang
Publikováno v:
A-SSCC
This paper presents a dual-loop 2-step ZQ calibration scheme with 20nm DRAM process to support dedicated supply voltage (VDD, VDDQ). The proposed calibration scheme maintains a target value of on-die termination (ODT) in DQ/CA regardless of the suppl