Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Hyunjae Jang"'
Autor:
In Huh, Mun-Bo Shim, Kyuhun Lee, Byungseon Choi, Jae Myung Choe, Wonik Jang, Hyunjae Jang, Changwook Jeong, Dae Sin Kim, Sanghoon Myung, Jisu Ryu, Moon-Hyun Cha, Jinwoo Kim, Daeyoung Park, Ho-Joon Lee
Publikováno v:
IEEE Transactions on Electron Devices. 68:5364-5371
There is a growing consensus that the physics-based model needs to be coupled with machine learning (ML) model relying on data or vice versa in order to fully exploit their combined strengths to address scientific or engineering problems that cannot
Publikováno v:
Journal of Alloys and Compounds. 918:165649
Autor:
Hyunjae Jung, Hyung-Ryul Park, Hyeong Wook Kim, Hyunjae Jang, Johann Cho, Changyong Oh, Bo Sung Kim
Publikováno v:
Journal of Alloys and Compounds. 805:211-217
We examined the electrical properties of low-temperature-processed top-gate In-Sn-Ga-O (ITGO) thin-film transistors (TFTs) by rf/dc-sputtering with different oxygen partial pressures (PO2). As PO2 changed from 0 to 50.0%, the ITGO TFT showed various
Publikováno v:
Journal of Alloys and Compounds. 875:160053
Top gate In-Ga-Sn-O (IGTO) thin-film transistors were fabricated with aluminum oxides (Al2O3) as gate insulators at a low temperature of 150 °C. Threshold voltage (Vth) of IGTO TFTs with Al2O3 grown by plasma-enhanced atomic layer deposition (PEALD)
Publikováno v:
IEEE Transactions on Electron Devices. 62:2710-2716
A general potential model is proposed for all types of double-gate junctionless FETs (DGJL-FETs), i.e., the symmetric versus asymmetric DG structures and the tied versus untied DG structures. The potential model is obtained with a simple form through
Autor:
Yang-Kyu Choi, Hee-Jeong Hong, Dong-Il Moon, Jee-Yeon Kim, Hyunjae Jang, Choong-Ki Kim, Jae-Sub Oh, Jeoung-Woo Kim, Minho Kang
Publikováno v:
IEEE Electron Device Letters. 35:1236-1238
A trigate FinFET with a charge trap gate dielectric is demonstrated for high-speed and long retention memory applications. For a capacitor-less dynamic memory cell, a nitride layer is utilized as a charge storage node and it is directly formed on a s
Autor:
Hyunjae Jang, Myeong-Lok Seol, Ji-Min Choi, Changhoon Kim, Jun-Bo Yoon, Yang-Kyu Choi, Dongil Lee, Byung-Hyun Lee, Dong-Il Moon, Min-Wu Kim
Publikováno v:
Nanoscale. 6:7799
A mechanical and electrical transistor structure (METS) is proposed for effective voltage scaling. The sub-2 nm nanogap by atomic layer deposition (ALD) without stiction and the application of a dielectric with high-permittivity allowed the pull-in v